industry news
Subscribe Now

Live 14nm 2.5D/HBM2/SerDes Seminar, presented by Samsung, ASE, eSilicon, Rambus and Northwest Logic

The seminar, presented live in Tokyo and Shanghai, will showcase a complete FinFET HBM2 supply chain solution

Tokyo, Japan and Shanghai, China — November 16, 2017 — Samsung Electronics, ASE Group, eSilicon, Rambus and Northwest Logic have joined forces to offer a complete FinFET-based high-bandwidth memory (HBM) supply chain solution. HBM2 is a JEDEC-defined standard that utilizes 2.5D technology to interconnect an SoC with an HBM memory stack. HBM2 is being used in very high-bandwidth applications. This seminar will present a complete FinFET-based supply chain that leverages advanced IP and 2.5D technology to deliver customer designs now.

The live, in-person seminar, “14nm 2.5D/HBM2/SerDes Alliance for High-Performance Networking, Computing, Deep Learning and 5G Infrastructure,” will be held in Tokyo on 11 December and in Shanghai on 14 December. The event is free, but registration is required by 18:00 on 5 December. Agenda:

10:30 Check in and networking

11:00 Samsung, HBM2 memory solution

11:30 Samsung, Foundry solution including 14nm FinFET  technology

12:00 ASE, advanced 2.5D packaging

12:30 Lunch

13:30 eSilicon, ASIC and 2.5D design and implementation, HBM2 PHY, high-speed memories

14:00 Rambus, high-performance SerDes

14:30 Northwest Logic, HBM2 controller

15:00 Networking cocktail reception and lucky draws

“ASE works closely with our customers to implement HBM into their high-performance products from the early stages of development through the final product launch. We look forward to sharing our expertise in these key areas as new products come to market,” said CP Hung, VP of corporate R&D, ASE Group.

“eSilicon is currently in production with HBM customer chips using its HBM2 PHY and advanced ASIC design and packaging capabilities for high-performance networking and AI,” said Hugh Durdan, eSilicon’s vice president of strategy and products. “We’ve been doing R&D in 2.5D since 2011—it’s gratifying to have these complex ASICs become real.”

“With nearly 30 years of high-speed interface design experience, Rambus develops advanced SerDes and memory IP cores that solve the power, performance and capacity challenges of communications, networking and data center markets,” said Mohit Gupta, senior director product marketing at Rambus. “By working together with other leaders in the IP ecosystem to share our expertise at seminars such as these, we are excited to help our customers bring high-quality, comprehensive solutions to the market.”

“Northwest Logic’s highly configurable HBM2 controller is being used in a wide range of high-performance HBM2 applications. This seminar provides a great opportunity to quickly get up to speed on HBM2 and learn how it can be used to create highly differentiated products in high-performance applications,” said Brian Daellenbach, president of Northwest Logic.

Registration is open and details are available on the 14nm 2.5D/HBM2/SerDes Alliance seminar page.

About Samsung Electronics Co., Ltd.

Samsung inspires the world and shapes the future with transformative ideas and technologies. The company is redefining the worlds of TVs, smartphones, wearable devices, tablets, digital appliances, network systems, and memory, system LSI and Foundry. For the latest news, please visit the Samsung Newsroom at http://news.samsung.com

About ASE Group
The ASE Group is among the leading providers of independent semiconductor manufacturing services in assembly, test, materials and design manufacturing. As a global leader geared towards meeting the industry’s ever growing needs for faster, smaller and higher performance chips, the Group develops and offers a wide portfolio of technology and solutions including IC test program design, front-end engineering test, wafer probe, wafer bump, substrate design and supply, wafer level package, flip chip, system-in-package, final test and electronic manufacturing services through USI Inc and its subsidiaries, members of the ASE Group. For more information about the ASE Group, visit www.aseglobal.com or twitter @asegroup_global.

About eSilicon
eSilicon is an independent provider of complex FinFET-class ASIC design, custom IP and advanced 2.5D packaging solutions. Our ASIC+IP synergies include complete, silicon-proven 2.5D/HBM2 and TCAM platforms for FinFET technology at 14/16nm. Supported by patented knowledge base and optimization technology, eSilicon delivers a transparent, collaborative, flexible customer experience to serve the high-bandwidth networking, high-performance computing, artificial intelligence (AI) and 5G infrastructure markets.

About Rambus
Rambus creates innovative hardware and software technologies, driving advancements from the data center to the mobile edge. Our chips, customizable IP cores, architecture licenses, tools, software, services, training and innovations improve the competitive advantage of our customers. We collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation labs. Our products are integrated into tens of billions of devices and systems, powering and securing diverse applications, including Big Data, Internet of Things (IoT), mobile payments, and smart ticketing. At Rambus, we are makers of better. For more information, visit rambus.com.

About Northwest Logic
Northwest Logic, founded in 1995 and located in Beaverton, Oregon, provides high-performance, silicon-proven, easy-to-use IP cores including high-performance PCI Express Solution (PCI Express 4.0/3.0/2.1/1.1 cores, DMA cores and drivers), Memory Interface Solution (HBM2, DDR4/3, LPDDR4/3, MRAM), and MIPI Solution (CSI-2, DSI-2, DSI). These solutions support a full range of platforms including ASICs, Structured ASICs and FPGAs.

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Power High-Performance Applications with Renesas RA8 Series MCUs
Sponsored by Mouser Electronics and Renesas
In this episode of Chalk Talk, Amelia Dalton and Kavita Char from Renesas explore the first 32-bit MCUs based on the new Arm® Cortex® -M85 core. They investigate how these new MCUs bridge the gap between MCUs and MPUs, the advanced security features included in this new MCU portfolio, and how you can get started using the Renesas high performance RA8 series in your next design. 
Jan 9, 2024
15,177 views