industry news
Subscribe Now

Efinix® Announces Availability of Reconfigurable Acceleration Platform

SANTA CLARA, Calif.– Efinix®, an innovator in programmable product platforms and technology, today announced general availability of its Reconfigurable Acceleration Platform (RAP) initiative. Under the RAP initiative, Efinix will open its Quantum™ technology to a wider variety of engagement models.

“While Efinix has partnered to provide its Quantum technology in SIP or licensable core formats, most of our customer engagements to date have been with the popular Trion® and Trion Titanium lines of FPGAs,” said Mark Oliver, VP of marketing at Efinix. “The RAP initiative gives customers expanded access to known good die for SIP integration, core integration with customer-defined peripheral IP, and licensable cores for inclusion in customer-specific ASIC designs.”

The RAP initiative builds upon a wealth of experience gained in custom engagements with partners. It aims to deliver the Quantum technology’s power, performance, and area advantage to edge computing applications where space and thermal considerations can be particularly constraining. By working with Efinix in RAP engagements, partners can develop custom ASIC and SIP products that are tailored to the exact requirements of particular applications while retaining the acceleration and real-time hardware optimization that is the cornerstone of Efinix’s Quantum technology.

“As one of the early access partners to the RAP program, we licensed the core Quantum technology and were able to verify its potentials,” said ChanHo Yoon, Master of Memory Advanced Solution Development at Samsung Electronics. “Working closely with Efinix, the cores were successfully ported to our 10nm process node and integrated with our controller IP for verification.”

The Efinix RAP initiative was born out of a realization that no one FPGA configuration can be perfect for every application. By separating the Quantum core technology from the peripheral interfaces and providing it to partners to use in their own custom designs, customers can now create cost-effective custom solutions with an application-specific mix of peripherals and system elements. The RAP initiative’s range of engagement options means that customers can select the time to market, investment, and risk profile that best fits their market and design capabilities.

“Our business is industrial control and automation. We needed a turnkey solution in a small footprint that would perform a custom function in a cost-effective design. There were no solutions on the market that met all those criteria,” said Pengfei Yan, VP of engineering at HCFA. “By taking known good die from Efinix and combining it with an application processor and flash memory in a single SIP package we were able to meet our small footprint and low-power requirements.”

All Quantum cores from the Trion and Trion Titanium families are included in the RAP initiative. For more information on the Efinix RAP initiative, visit In addition, Efinix will present an overview of the RAP initiative and will host a virtual trade show booth for discussions and Q&A, at the Samsung Advanced Foundry Ecosystem (SAFE) Forum on October 28th.

About Efinix

Efinix®, an innovator in programmable products, drives the future of edge AI computing with its Trion® and Trion Titanium FPGA silicon platforms. At the Trion family’s core is Efinix’s disruptive Quantum™ FPGA technology which delivers power, performance and area advantage over traditional FPGA technologies. Trion FPGAs, offering 4K to 500K logic elements, have a small form-factor, low-power, and are priced for high-volume production. Our Efinity® Integrated Development Environment provides a complete FPGA design suite from RTL to bitstream. With their Power-Performance-Area advantage, Trion FPGAs address applications such as custom logic, compute acceleration, machine learning and deep learning.

For more information, visit

Leave a Reply

featured blogs
Oct 21, 2020
We'€™re concluding the Online Training Deep Dive blog series, which has been taking the top 15 Online Training courses among students and professors and breaking them down into their different... [[ Click on the title to access the full blog on the Cadence Community site. ...
Oct 20, 2020
In 2020, mobile traffic has skyrocketed everywhere as our planet battles a pandemic. saw nearly double the mobile traffic in the first two quarters than it normally sees. While these levels have dropped off from their peaks in the spring, they have not returned to ...
Oct 19, 2020
Have you ever wondered if there may another world hidden behind the facade of the one we know and love? If so, would you like to go there for a visit?...
Oct 16, 2020
[From the last episode: We put together many of the ideas we'€™ve been describing to show the basics of how in-memory compute works.] I'€™m going to take a sec for some commentary before we continue with the last few steps of in-memory compute. The whole point of this web...

featured video

Better PPA with Innovus Mixed Placer Technology – Gigaplace XL

Sponsored by Cadence Design Systems

With the increase of on-chip storage elements, it has become extremely time consuming to come up with an optimized floorplan with manual methods. Innovus Implementation’s advanced multi-objective placement technology, GigaPlace XL, provides automation to optimize at scale, concurrent placement of macros, and standard cells for multiple objectives like timing, wirelength, congestion, and power. This technology provides an innovative way to address design productivity along with design quality improvements reducing weeks of manual floorplan time down to a few hours.

Click here for more information about Innovus Implementation System

Featured Paper

The Cryptography Handbook

Sponsored by Maxim Integrated

The Cryptography Handbook is designed to be a quick study guide for a product development engineer, taking an engineering rather than theoretical approach. In this series, we start with a general overview and then define the characteristics of a secure cryptographic system. We then describe various cryptographic concepts and provide an implementation-centric explanation of physically unclonable function (PUF) technology. We hope that this approach will give the busy engineer a quick understanding of the basic concepts of cryptography and provide a relatively fast way to integrate security in his/her design.

Click here to download the whitepaper

Featured Chalk Talk

Thermal Bridge Technology

Sponsored by Mouser Electronics and TE Connectivity

Recent innovations can make your airflow cooling more efficient and effective. New thermal bridges can outperform conventional thermal pads in a number of ways. In this episode of Chalk Talk, Amelia Dalton chats with Zach Galbraith of TE Connectivity about the application of thermal bridges in cooling electronic designs.

More information about TE Thermal Bridge Technology