industry news
Subscribe Now

Draft of Accellera Portable Test and Stimulus Standard 2.0 Now Available for Public Review

What:

Accellera Systems Initiative, the electronics industry organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards, announced the availability of the Portable Test and Stimulus Draft Standard 2.0 (PSS) for public review. Download the draft standard for review here.

The Portable Test and Stimulus Draft Standard 2.0 includes about 90% of the projected functionality that will be included in the official Portable Test and Stimulus Standard 2.0 release expected in March 2021.  Accellera’s Portable Stimulus Working Group (PSWG) welcomes feedback from the community on the major additions included in the draft while the group finalizes the remaining functionality.

When:

Public review will open on November 18, 2020 and close on December 18, 2020.

About:

New major features intend to improve the usability of the Portable Test and Stimulus Standard 2.0 and expand its portability and flexibility to a broader class of verification challenges.

Additions to the draft of the 2.0 standard include several new language features:

  • Core Library for standard portable functionality and utilities for common PSS applications, including register accesses and memory allocation and management
  • Collection types, including arrays, lists, maps, and sets
  • Parameterized types
  • Constraint enhancements, including default constraints and propagation
  • Enhanced activity-level generation and scheduling constructs
  • Improved portability of procedural constructs for test realization

How to participate and influence the standard:

The Portable Stimulus Working Group invites and encourages the community to participate in the review and provide feedback on the new additions to the standard.

Feedback can be provided through Accellera’s Portable Stimulus 2.0 Public Review Community Forum.

For more information on the working group and to view additional resources, visit the Portable Stimulus Working Group page.

About Accellera

Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit www.accellera.org. Find out more about membership. Follow @accellera on Twitter or to comment, please use #accellera. Accellera Global Sponsors are: Cadence; Mentor, A Siemens Business; and Synopsys.

Leave a Reply

featured blogs
Nov 24, 2020
The ICADVM20.1 and IC6.1.8 ISR15 production releases are now available for download at Cadence Downloads . For information on supported platforms and other release compatibility information, see the... [[ Click on the title to access the full blog on the Cadence Community si...
Nov 23, 2020
It'€™s been a long time since I performed Karnaugh map minimizations by hand. As a result, on my first pass, I missed a couple of obvious optimizations....
Nov 23, 2020
Readers of the Samtec blog know we are always talking about next-gen speed. Current channels rates are running at 56 Gbps PAM4. However, system designers are starting to look at 112 Gbps PAM4 data rates. Intuition would say that bleeding edge data rates like 112 Gbps PAM4 onl...
Nov 20, 2020
[From the last episode: We looked at neuromorphic machine learning, which is intended to act more like the brain does.] Our last topic to cover on learning (ML) is about training. We talked about supervised learning, which means we'€™re training a model based on a bunch of ...

featured video

Accelerate Automotive Certification with Synopsys Functional Safety Test Solution

Sponsored by Synopsys

With the Synopsys Functional Safety Test Solution architecture, designers of automotive SoCs can integrate an automated, end-to-end BIST solution to accelerate ISO compliance and time-to-market.

Click here for more information about Embedded Test & Repair

Featured paper

Top 9 design questions about digital isolators

Sponsored by Texas Instruments

Looking for more information about digital isolators? We’re here to help. Based on TI E2E™ support forum feedback, we compiled a list of the most frequently asked questions about digital isolator design challenges. This article covers questions such as, “What is the logic state of a digital isolator with no input signal?”, and “Can you leave unused channel pins on a digital isolator floating?”

Click here to download the whitepaper

Featured Chalk Talk

Maxim's First Secure Micro with ChipDNA PUF Technology

Sponsored by Mouser Electronics and Maxim Integrated

Most applications today demand security, and that starts with your microcontroller. In order to get a truly secure MCU, you need a root of trust such as a physically unclonable function (PUF). In this episode of Chalk Talk, Amelia Dalton chats with Kris Ardis of Maxim Integrated about how the Maxim MAX32520 MCU with PUF can secure your next design.

Click here for more info about Amphenol RF 5G Wireless Connectors