Bytom, Poland. May 26, 2026. DCD-SEMI, a leading provider of synthesizable IP cores and SoC design services, today announced the DESPI eSPI Combo, a complete Enhanced Serial Peripheral Interface (eSPI) solution combining the DESPI eSPI Controller IP Core and the DESPI eSPI Target IP Core for high-performance FPGA and ASIC designs. Optimized for Intel-based embedded platforms and modern replacements of legacy LPC interfaces, the new combo enables robust host–target connectivity at up to 66 MHz over single, dual, and quad SPI links.
The DESPI eSPI Controller IP Core is a fully configurable eSPI host/controller, compliant with the eSPI Base Specification Revision 1.6 and designed for integration into complex SoC architectures. It provides a high-speed serial interface to Embedded Controllers (EC) and eSPI peripherals in Intel CPU platforms, ensuring low-latency communication and reduced pin count for space- and cost-constrained designs.
Complementing the controller, the DESPI eSPI Target IP Core operates as a configurable eSPI Target IP, also compliant with the eSPI Base Specification Revision 1.6. It supports single and multi-target configurations, making it ideal for ECs, peripheral devices, and multi-slave microcontroller systems that require reliable eSPI connectivity in demanding embedded and industrial applications.
“System designers working on Intel-based platforms want a clean, future-proof migration path away from LPC, without compromising bandwidth or reliability,” said Jacek Hanke, CEO of DCD-SEMI. “With the DESPI eSPI combo, we deliver both sides of the link: Controller and Target. As technology agnostic RTL that drops into any major FPGA or ASIC flow and scales from a single to complex multi-target systems.”
Both DESPI eSPI cores leverage a high-speed SPI interface capable of operating at serial clock frequencies up to 66 MHz, with support for single, dual, and quad SPI transfers to maximize bandwidth. Large, highly configurable shared memory buffer enables efficient and flexible frame and data storage to fit any needs.
The DESPI eSPI Combo supports customizable peripheral channels including memory-mapped I/O, Virtual Wire signals, event and alert signaling, and optional out-of-band and flash access channels. This flexibility enables precise tailoring of the eSPI fabric to application needs, from high-speed data acquisition and industrial control systems to embedded platforms where deterministic EC communication is critical.
“By offering a controller–target bundle, we simplify qualification and verification for our customers – they can prototype and validate their entire eSPI path using a single, silicon-proven IP family,” said Jacek Hanke. “Combined with our long-standing expertise in processor and peripheral IP, this gives SoC teams a fast, low-risk route to production.”
Both IP cores are delivered as technology-agnostic RTL, ensuring compatibility with all major FPGA and ASIC vendors and simplifying migration between prototype and production silicon. They are fully customizable at delivery, allowing customers to enable only the required channels and features to minimize area and power, while preserving a clear upgrade path for future products.
Typical use cases for the DESPI eSPI Combo include host interfaces for ECs in Intel CPU platforms, FPGA/ASIC-based SoCs requiring eSPI master functionality, high-speed industrial peripherals, and multi-target microcontroller architectures where low-latency, high-throughput communication is required. As a modern replacement for LPC, the combo supports next-generation embedded systems that demand higher integration, reduced pin count, and improved system throughput.
About DCD-SEMI
Founded in 1999 and headquartered in Bytom, Poland, DCD-SEMI is one of the most experienced IP core providers in the semiconductor industry. Its synthesizable VHDL and Verilog IP cores have powered more than 1 billion electronic devices worldwide, spanning automotive, industrial, and embedded markets. The company’s portfolio includes processor and microcontroller IP, communication interfaces, and SoC components, supported by in‑house design expertise and a global customer base.
