industry news
Subscribe Now

CEVA Extends its Leadership in High Performance Scalable Sensor Hub DSPs with 2nd Generation SensPro Family

  • SensPro2™ delivers up to 6X DSP performance improvement in computer vision, 2X AI inferencing improvement and 20% lower power compared to 1st generation SensPro, at the same process node
  • New, low power, entry-level SensPro2 DSPs deliver up to 10X performance improvement versus CEVA-BX2 DSP for AI networks used for voice assistants, natural language processing and spatial audio
  • Automotive-ready SensPro2 DSP with high-precision floating-point capability targets electric powertrain battery management and Radar systems

    ROCKVILLE, MD, January 12, 2021 – CEVA, Inc. (NASDAQ: CEVA), the leading licensor of wireless connectivity and smart sensing technologies, today introduced its 2nd generation SensPro DSP family, a hub for AI and DSP processing workloads associated with a wide range of sensors including camera, Radar, LiDAR, Time-of-Flight, microphones and inertial measurement units (IMUs). SensPro2™ builds on CEVA’s industry leadership in sensor hub DSPs, delivering 6X more DSP processing for computer vision, 8X more DSP performance for Radar processing, a 2X improvement in AI inferencing, and 20% more power efficient versus its predecessor, at the same process node.

    The SensPro2 family has been expanded to include seven vector DSP cores, scaling in power and performance. The new entry-level cores address DSP and AI workloads requiring up to 1 TOPS AI performance and the high-end cores reach 3.2 TOPS. Each of the SensPro2 family members can be configured with application-specific instruction set architectures (ISAs) for radar, audio, computer vision and SLAM, along with parallel vector compute options for floating point and integer data types, to get the highest efficiency sensor hub DSP for their specific use-case.

    “Our new SensPro2 family of power-efficient sensor hub DSPs offers scalable performance, multiple precisions and high utilization for the increasingly complex and diverse AI/sensor workloads of contextually-aware devices,” said Ran Snir, Vice President of R&D at CEVA. “The SensPro2 architecture is unique and innovative and uses a common ISA enabling seamless software reusability across all the SensPro2 DSPs. Our customers highly value this, along with the application-specific ISAs, as they increasingly utilize SensPro2 cores in their product designs.”

    The SensPro2 architecture adopts a range of enhancements that have increased the performance and boosted efficiency for multitasking sensing and AI use cases, such as a new low power vector DSP architecture. For automotive powertrain applications, the upgraded floating-point DSPs offer high-precision performance, addressing the electrification trend with a powerful processor. Moreover, the SensPro2 architecture and cores are automotive ready with ASIL B hardware random faults and ASIL D systematic fault certification. In terms of performance, SensPro2 is capable of delivering up to 3.2 TOPS for 8×8 networks inferencing running at 1.6GHz, and doubles the memory bandwidth from the 1st generation, to more efficiently address data-intensive fully-connected layers.

    The 2nd generation SensPro DSP family consists of:

    • The SP100 and SP50 DSPs, with 128 and 64 INT8 MACS, respectively. These DSPs offer the smallest die size and deliver a 10X performance improvement for DeepSpeech2 speech recognition neural network, compared to the CEVA-BX2 scalar DSP, and are ideal for audio AI workloads, such as conversational assistants, sound analytics, and natural language processing (NLP).
    • The SP1000, SP500 and SP250 DSPs with 1024, 512, and 256 INT8 MACs, respectively. These DSPs offer the highest performance and precision in the SensPro2 family, with optimal configurability for computer vision, SLAM, Radar, and AI workloads.
    • The SPF4 and SPF2 floating point DSPs, with 64 and 32 single precision floating point MACs, respectively. These DSPs are optimized for electric vehicle powertrain control and battery management systems, complemented by a full suite of Eigen Linear Algebra, MATLAB vector libraries and support for Glow graph compiler.

    SensPro2 is supported by a broad portfolio of software infrastructure to expedite system designs including an LLVM C/C++ compiler, Eclipse based integrated development environment (IDE), OpenVX API, software libraries for OpenCL, CEVA deep neural network (CDNN) graph compiler including the CDNN-Invite API for inclusion of custom AI engines, CEVA-CV imaging functionsCEVA-SLAM software development kit and vision libraries, Radar SDK, ClearVox noise reductionWhisPro speech recognitionMotionEngine sensor fusion, Tensor Flow Lite Micro support, and the SenslinQ software framework.

    Availability
    The SensPro2 architecture and cores are available now for general licensing. For more information, visit https://www.ceva-dsp.com/product/ceva-SensPro/.

    About CEVA, Inc.
    CEVA is the leading licensor of wireless connectivity and smart sensing technologies. We offer Digital Signal Processors, AI processors, wireless platforms and complementary software for sensor fusion, image enhancement, computer vision, voice input and artificial intelligence, all of which are key enabling technologies for a smarter, connected world. We partner with semiconductor companies and OEMs worldwide to create power-efficient, intelligent and connected devices for a range of end markets, including mobile, consumer, automotive, robotics, industrial and IoT. Our ultra-low-power IPs include comprehensive DSP-based platforms for 5G baseband processing in mobile and infrastructure, advanced imaging and computer vision for any camera-enabled device and audio/voice/speech and ultra-low power always-on/sensing applications for multiple IoT markets. For sensor fusion, our Hillcrest Labs sensor processing technologies provide a broad range of sensor fusion software and IMU solutions for AR/VR, robotics, remote controls, and IoT. For artificial intelligence, we offer a family of AI processors capable of handling the complete gamut of neural network workloads, on-device. For wireless IoT, we offer the industry’s most widely adopted IPs for Bluetooth (low energy and dual mode), Wi-Fi 4/5/6 (802.11n/ac/ax) and NB-IoT. Visit us at www.ceva-dsp.com and follow us on TwitterYouTubeFacebookLinkedIn and Instagram.

Leave a Reply

featured blogs
Jan 17, 2021
https://youtu.be/mKoW8ji9_g8 Made in my kitchen (camera Ziyue Zhang) Monday: Young People Program at DATE 2021 Tuesday: IEDM Opening Keynote Wednesday: Cadence/Arm Event on Optimizing High-End Arm... [[ Click on the title to access the full blog on the Cadence Community site...
Jan 15, 2021
I recently saw (what appears at first glance to be) a simple puzzle involving triangles. But is finding the solution going to be trickier than I think?...
Jan 14, 2021
Learn how electronic design automation (EDA) tools & silicon-proven IP enable today's most influential smart tech, including ADAS, 5G, IoT, and Cloud services. The post 5 Key Innovations that Are Making Everything Smarter appeared first on From Silicon To Software....
Jan 13, 2021
Testing is the final step of any manufacturing process, and arguably the most important, and yet it can often be overlooked.  Releasing a poorly tested product onto the market has destroyed more than one reputation for quality, and this is even more important in an age when ...

featured paper

Overcoming Signal Integrity Challenges of 112G Connections on PCB

Sponsored by Cadence Design Systems

One big challenge with 112G SerDes is handling signal integrity (SI) issues. By the time the signal winds its way from the transmitter on one chip to packages, across traces on PCBs, through connectors or cables, and arrives at the receiver, the signal is very distorted, making it a challenge to recover the clock and data-bits of the information being transferred. Learn how to handle SI issues and ensure that data is faithfully transmitted with a very low bit error rate (BER).

Click here to download the whitepaper

Featured Chalk Talk

Maxim's Himalaya uSLIC Portfolio

Sponsored by Mouser Electronics and Maxim Integrated

With form factors continuing to shrink, most engineers are working hard to reduce the number of discrete components in their designs. Power supplies, in particular, are problematic - often requiring a number of large components. In this episode of Chalk Talk, Amelia Dalton chats with John Woodward of Maxim Integrated about how power modules can save board space, improve performance, and help reliability.

Click here for more information about Maxim Integrated Himalaya uSLIC™ MAXM1546x Step-Down Power Modules