industry news
Subscribe Now

Cadence JasperGold Formal Verification Platform Enables Hitachi to Develop Measures for Fault Avoidance to Comply with IEC 61508 Series SIL 4 Requirements

Hitachi uses Cadence formal verification technologies to improve verification methodology for its ν COSS S-zero functional safety controller

SAN JOSE, Calif., July 5, 2018—Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Hitachi, Ltd. has used the Cadence JasperGold Formal Verification Platform to developνCOSS S-zero, an industrial facilities functional safety controller that has been certified for Safety Integrity Level (SIL) 3 in accordance with the International Electrotechnical Commission (IEC) 61508 Series functional safety standard. Through use of the Cadence technologies, Hitachi successfully developed measures for fault avoidance to comply with IEC 61508 Series SIL 4 requirements, ensuring that its functional safety controller operates correctly in response to its inputs and maintains safety.

Hitachi used the JasperGold platform to easily adopt formal methods and perform the multiple hardware verification tasks needed to deliver a robust, fail-safe mechanism that meets IEC 61508 safety requirements. Use of the Cadence technologies helped Hitachi verify hardware calculation elements that were developed internally for system-specific controls. The JasperGold platform’s ProofCore technology, which analyzes the design under test (DUT), helped Hitachi improve its verification environment to ensure that the functional safety controller operates correctly in response to its inputs while maintaining safety. Hitachi also incorporated Cadence simulation and emulation solutions with the JasperGold platform to achieve 100 percent verification of the safety requirements.

“Functional safety compliance is critical for industrial facilities systems and our customers,” said Masahiro Shiraishi, group leader engineer of Control System Platform Division, Omika Works at Hitachi, Ltd. “When compared with our previous verification methodology that was based on dynamic simulation, our new formal methodology based on the Cadence JasperGold platform allowed us to identify corner case bugs much earlier. Our close collaboration with Cadence lets our customers confidently adopt our industrial facilities functional safety controller knowing that it meets IEC 61508 compliance requirements.”

For more information on the JasperGold platform, please visit http://www.cadence.com/go/jaspergoldfs.

The JasperGold Formal Verification Platform is part of the Cadence Verification Suite. It supports the company’s System Design Enablement strategy, which enables system and semiconductor companies to create complete, differentiated end products more efficiently. The Cadence Verification Suite is comprised of the best-in-class JasperGold, Xcelium™, Palladium® Z1 and Protium™ S1 core engines, verification fabric technologies and solutions that increase design quality and throughput, fulfilling verification requirements for a wide variety of applications and vertical segments.

About Cadence
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine’s 100 Best Companies to Work For. Learn more at cadence.com.

Leave a Reply

featured blogs
Apr 19, 2024
Data type conversion is a crucial aspect of programming that helps you handle data across different data types seamlessly. The SKILL language supports several data types, including integer and floating-point numbers, character strings, arrays, and a highly flexible linked lis...
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...
Apr 18, 2024
See how Cisco accelerates library characterization and chip design with our cloud EDA tools, scaling access to SoC validation solutions and compute services.The post Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud appeared first on Chip Design....

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured chalk talk

Achieving Reliable Wireless IoT
Wireless connectivity is one of the most important aspects of any IoT design. In this episode of Chalk Talk, Amelia Dalton and Brandon Oakes from CEL discuss the best practices for achieving reliable wireless connectivity for IoT. They examine the challenges of IoT wireless connectivity, the factors engineers should keep in mind when choosing a wireless solution, and how you can utilize CEL wireless connectivity technologies in your next design.
Nov 28, 2023
19,262 views