industry news
Subscribe Now

Cadence Delivers Machine Learning-Optimized Xcelium Logic Simulation with up to 5X Faster Regressions

Core engine performance enhancements accelerate verification throughput by reducing simulation cycles with matching coverage on randomized test suites

SAN JOSE, Calif., August 12, 2020—Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the Cadence® Xcelium™ Logic Simulator has been enhanced with machine learning technology (ML), called Xcelium ML, to increase verification throughput. Using new machine learning technology and core computational software, Xcelium ML enables up to 5X faster verification closure on randomized regressions.

Using computational software and a proprietary machine learning technology that directly interfaces to the simulation kernel, Xcelium ML learns iteratively over an entire simulation regression. It analyzes patterns hidden in the verification environment and guides the Xcelium randomization kernel on subsequent regression runs to achieve matching coverage with reduced simulation cycles.

Cadence’s Xcelium Logic Simulator provides best-in-class core engine performance for SystemVerilog, VHDL, mixed-signal, low power, and x-propagation. It supports both single-core and multi-core simulation, incremental and parallel build, and save/restart with dynamic test reload. The Xcelium Logic Simulator has been deployed by a majority of top semiconductor companies, and a majority of top companies in the hyperscale, automotive and consumer electronics segments.

“Kioxia has effectively utilized Xcelium simulation for a variety of our designs, and it addresses our ever-growing verification needs,” said Kazunari Horikawa, senior manager, Design Technology Innovation Division at Kioxia Corporation. “With the new Xcelium ML, we’ve seen a 4X shorter turnaround time in our fully random regression runs to reach 99% function coverage of original, and plan to use this technology in production designs to shorten the time to market for Kioxia’s business.”

“Xcelium ML is a powerful technology and a great example of the significant opportunity we have to leverage machine learning in verification,” said Paul Cunningham, corporate vice president and general manager of the System & Verification Group at Cadence. “Logic simulation continues to be the workhorse of digital verification, and we are investing heavily in fundamental performance optimizations like Xcelium ML to deliver the highest verification throughput to customers using our flow.”

Xcelium ML is part of the Cadence Verification Suite and supports the company’s Intelligent System Design strategy, enabling pervasive intelligence and faster design closure. For more information on Xcelium ML, please visit http://www.cadence.com/go/XceliumML.

About Cadence
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace, industrial and healthcare. For six years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

Leave a Reply

featured blogs
Jan 24, 2022
I just created a handy-dandy one-page Quick-Quick-Start Guide for seniors that covers their most commonly asked questions pertaining to the iPhone SE....
Jan 24, 2022
In my previous article ( From AMBA ACE to CHI, Why Move for Coherency? ) I talked about how coherency needs have evolved from AMBA ACE to the highly successful and widely adopted CHI architecture.... [[ Click on the title to access the full blog on the Cadence Community site...
Jan 20, 2022
High performance computing continues to expand & evolve; our team shares their 2022 HPC predictions including new HPC applications and processor architectures. The post The Future of High-Performance Computing (HPC): Key Predictions for 2022 appeared first on From Silico...

featured video

Synopsys & Samtec: Successful 112G PAM-4 System Interoperability

Sponsored by Synopsys

This Supercomputing Conference demo shows a seamless interoperability between Synopsys' DesignWare 112G Ethernet PHY IP and Samtec's NovaRay IO and cable assembly. The demo shows excellent performance, BER at 1e-08 and total insertion loss of 37dB. Synopsys and Samtec are enabling the industry with a complete 112G PAM-4 system, which is essential for high-performance computing.

Click here for more information about DesignWare Ethernet IP Solutions

featured paper

How an SoM accelerates and simplifies processor-based designs

Sponsored by Texas Instruments

If you're comfortable working with integrated circuits that have four to 48 pins, building a custom printed circuit board (PCB) for a new product might make sense. But when your design is complex—think: processor with more than 300 pins, DDR memory, eMMC, complex physical layout, and all the electrical considerations that go with it—a simpler, lower-risk, off-the-shelf product is often a better solution. Discover the benefits of a system-on-module (SoM) for complex, high-pin-count PCB designs.

Click here to read more

featured chalk talk

Security Regulations Drive Requirements

Sponsored by Mouser Electronics and Silicon Labs

IoT Security certification schemes can be complex, but security identities and security certification inheritance can make this aspect of your IoT design quite a bit easier. In this episode of Chalk Talk, Amelia Dalton chats with Mike Dow from Silicon Labs about the current state of global security regulations, the difference between physical and logical attacks, and how Silicon Labs SoCs and modules can help you solve the security demands of your next design.

Click here for more information about Silicon Labs EFR32xG21B SoC & xGM210P Modules with Secure Vault