- Cadence 20.1 digital full flow tuned for Samsung Foundry advanced-process nodes, enabling optimal PPA and first-pass silicon success
- HPC reference flows based on iSpatial technology enable rapid design implementation
- Digital flow’s ML and concurrent macro, standard cell and placement capabilities deliver improved productivity and design optimization
SAN JOSE, Calif., April 8, 2021—Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has optimized the Cadence® digital 20.1 full flow for Samsung Foundry’s advanced-process technologies down to 4nm. Through the collaboration, designers can use the Cadence tools to achieve optimal power, performance, and area (PPA) and deliver accurate, first-pass silicon for hyperscale computing applications.
The Cadence digital 20.1 flow provides capabilities that are well-suited for Samsung Foundry’s advanced-process technologies. For example, the iSpatial technology allows a seamless transition from the Genus™ Synthesis Solution to the Innovus™ Implementation System using a common user interface and database. Machine learning (ML) capabilities enable users to leverage their existing designs to train the GigaOpt™ optimization technology to minimize design margins versus traditional place-and-route flows.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications, including consumer, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and healthcare. For six years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.