industry news
Subscribe Now

Cadence Achieves TÜV SÜD’s First Comprehensive “Fit for Purpose – TCL1” Certification in Support of Automotive ISO 26262 Standard

New level of certification established by TÜV SÜD that recognizes the growing importance of EDA in the automotive safety market

•       Automotive chip designers can easily verify flow-level certification through the TÜV SÜD certification database

•       New ISO 26262-compliant PCB design and verification flow documentation delivered and certified; documentation also certified for existing custom design and verification flow and enhanced digital implementation and signoff flow that incorporates the Virtuoso Liberate Characterization Solution

SAN JOSE, Calif., October 11, 2017 — Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that it has achieved the industry’s first comprehensive “Fit for Purpose – Tool Confidence Level 1 (TCL1)” certification from TÜV SÜD, enabling automotive semiconductor manufacturers, OEMs and component suppliers to meet stringent ISO 26262 automotive safety requirements. To achieve certification, Cadence provided its tool and flow documentation to TÜV SÜD for evaluation, and TÜV SÜD confirmed the Cadence® flows are fit for use with ASIL A through ASIL D automotive design projects. The functional safety documentation kits cover analog and mixed-signal, digital front-end and verification, digital implementation and signoff, and PCB flows comprised of nearly 40 tools, offering the broadest EDA-certified tool and flow documentation to support the automotive industry.

Cadence customers can easily access the tool and flow documentation and TÜV SÜD technical reports via the Cadence Automotive Functional Safety Kits at www.cadence.com/go/iso26262cert.

Based on the growing importance of EDA solutions for the automotive safety market, both TÜV SÜD and Cadence determined that it was necessary to add a new certification level to further ease the automotive chip designer’s process for achieving ISO 26262 compliance. The Cadence flow-level certification is verifiable via the TÜV SÜD certification database.

Under this new certification model, certificates have been issued for each tool flow documentation kit and have a five-year validity. TÜV SÜD plans to review updates to the tool flows and their impact on ISO 26262 compliance at least once a year.

“We collaborated with Cadence and determined that establishing a documentation certification program could benefit customers applying the Cadence tool chains in ASIL A through ASIL D projects,” said Günter Greil, head of the generic functional safety components department at TÜV SÜD. “Automotive semiconductor manufacturers, OEMs and component suppliers are under pressure to meet aggressive delivery deadlines, while also achieving compliance with the ISO 26262 standard. The new documentation program allows customers to reduce the time spent on tool qualification so they can keep their focus on product innovation.”

The tool flow documentation that achieved the TÜV SÜD “Fit for Purpose – TCL1” certification and is included with Cadence Automotive Functional Safety Kits is as follows:

•       PCB design and verification flow: This new certification for PCB design includes everything from design authoring to simulation to physical realization and verification using the Cadence OrCAD, PSpice and Allegro product suites. The high-performance design entry, simulation and layout editing tools included with these suites provide an integrated environment for design engineers to validate the safety specifications against individual circuit specifications for design confidence.

•       Analog/mixed-signal design, implementation and verification flow: This flow brings transistor-level designs from creation and simulation through physical implementation and verification using the Cadence Virtuoso ADE Product Suite and the Spectre Circuit Simulation Platform. The Cadence Virtuoso ADE Verifier provides design engineers with an integrated means to validate the safety specifications against individual circuit specifications for design confidence.

•       Digital implementation and signoff flow: This flow covers RTL-to-GDSII implementation and signoff. The Cadence Virtuoso Liberate Characterization Solution is new to this flow and is incorporated with the 13 other pre-existing tools including the Cadence Innovus Implementation System, Genus Synthesis Solution, Modus Test Solution, Tempus Timing Signoff Solution, Quantus QRC Extraction Solution and Voltus IC Power Integrity Solution for the implementation and signoff of automotive designs.

The digital front-end design and verification flow’s documentation kit has been evaluated and confirmed to be compliant with ISO 26262, and is expected to achieve certification during Q4 2017. The flow documentation kit covers specification to RTL design to verification. The front-end digital tools include the Cadence Genus Synthesis Solution and Conformal Equivalence Checker. Functional and safety verification capabilities are provided by the Cadence Verification Suite, which includes the Cadence JasperGold Formal Verification Platform, Xcelium Parallel Logic Simulator (to be added to the flow documentation in Q4 2017), Palladium Z1 Enterprise Emulation Platform, Protium FPGA-Based Prototyping Platform, vManager Metric-Driven Signoff Platform and the Indago Debug Platform (to be added to the flow documentation in Q4 2017).

“Cadence’s flow-level approach to documentation aims to make it much simpler for automotive component suppliers to achieve compliance with the ISO 26262 standard,” said Raja Tabet, corporate vice president, Emerging Technologies at Cadence. “By providing pre-certified documentation, Cadence is greatly reducing the effort needed for customers to achieve their certification goals. Customers appreciate the flexibility and expediency that this approach allows. Partnering with TÜV SÜD on the flow-level certification of our documentation and the creation of the new ‘Fit for Purpose – TCL1’ certification mark demonstrates our commitment to the automotive market and support for semiconductor manufacturers, OEMs and component suppliers that are working to gain an edge with their respective solutions.”

About Cadence
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine’s 100 Best Companies to Work For. Learn more at cadence.com.

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

FleClear: TDK’s Transparent Conductive Ag Film
Sponsored by Mouser Electronics and TDK
In this episode of Chalk Talk, Amelia Dalton and Chris Burket from TDK investigate the what, where, and how of TDK’s transparent conductive Ag film called FleClear. They examine the benefits that FleClear brings to the table when it comes to transparency, surface resistance and haze. They also chat about how FleClear compares to other similar solutions on the market today and how you can utilize FleClear in your next design.
Feb 7, 2024
10,984 views