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Bluespec’s Accelerate-HLS Leverages RISC-V to Simplify and Speed the Development of HLS Applications

Accelerate-HLS is available now for Siemens Catapult HLS

FRAMINGHAM, Mass.–(BUSINESS WIRE)–Bluespec, Inc. unveiled its new Accelerate-HLS tool that simplifies and speeds the development of hardware using High-Level Synthesis (HLS) by offloading complex functionality that RISC-V processors can more effectively implement. Memory management—including address translation, coherence, and protection—is a complex, performance-critical requirement that is outside the expertise of the average designer and problematic for HLS designs. Accelerate-HLS eliminates this problem by providing HLS designs with direct access to proven, high-performance memory management that is standard fare in modern RISC-V processors.

In addition to memory management, another key use case for Accelerate-HLS is hardware configuration and control, which is the source of most functional bugs but typically very few performance bugs. Moving such functionality from HLS hardware to runtime software drastically reduces the time and effort to find, debug, and fix errors before and after a product’s release. Along with memory management offload, this further enhances HLS productivity through faster and better HLS synthesis and timing convergence.

Accelerate-HLS provides more than just RISC-V hooks into HLS. It also automatically generates the hardware-software stacks necessary to connect custom HLS designs to configurable RISC-V processors. This eliminates the time-consuming and risky manual hardware-software integration that is still common today.

Accelerate-HLS connects two powerful technologies for competing in the post-Moore’s Law era where differentiation is all about architectural innovation,” said Charlie Hauck, CEO at Bluespec. “While Accelerate-HLS clearly enables RISC-V users to leverage HLS, it also demonstrates that fusing RISC-V with an EDA tool can significantly enhance the user experience without explicitly adopting RISC-V. We’ll see much more of this as RISC-V penetrates EDA as it has silicon IP.”

Siemens’ Catapult™ software for high-level synthesis helps system developers migrate functions from software to hardware to produce systems that run faster on much less energy. Bluespec’s Accelerate-HLS is an enabling technology that simplifies this process,” said Mo Movahed, General Manager for High-Level Design Implementation and Verification Business Unit, Siemens Digital Industries Software. “We look forward to working with Bluespec to bring the combined benefits of Catapult and Accelerate-HLS to the marketplace.”

The initial release of Accelerate-HLS supports Siemens’ Catapult™ software for high-level synthesis and Bluespec RISC-V cores with coherent physical memory. Future Accelerate-HLS releases will support coherent virtual memory, Linux, multi-core, third-party RISC-V cores, and memory-mapped accelerators for Arm processor subsystems.

About Bluespec

Bluespec provides RISC-V tools and silicon IP that enable companies to exploit the freedom to innovate and cost reduction that RISC-V enables. We provide a complete RISC-V software development environment running on fast, hardware-accurate RISC-V cores in an FPGA-enabled cloud and a turnkey hardware acceleration tool for developing innovative high-performance low-power RISC-V subsystems. For more information on Bluespec, Inc. visit

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