SAN JOSE, Calif. – March 31, 2025 – Ayar Labs, the leader in optical interconnect solutions for large-scale AI workloads, today announced the industry’s first Universal Chiplet Interconnect Express™ (UCIe™) optical interconnect chiplet to maximize AI infrastructure performance and efficiency while reducing latency and power consumption. By incorporating a UCIe electrical interface, this solution is designed to eliminate data bottlenecks and integrate easily into customer chip designs.
Capable of achieving 8 Tbps bandwidth, the TeraPHY™ optical I/O chiplet is powered by Ayar Labs’ 16-wavelength SuperNova™ light source. The integration of a UCIe interface means this solution not only delivers high performance and efficiency but also enables interoperability among chiplets from different vendors. This compatibility with the UCIe standard creates a more accessible, cost-effective ecosystem, which streamlines the adoption of advanced optical technologies necessary for scaling AI workloads and overcoming the limitations of traditional copper interconnects.
“Optical interconnects are needed to solve power density challenges in scale-up AI fabrics,” said Mark Wade, CEO and co-founder of Ayar Labs. “We recognized early on the potential for co-packaged optics, which positioned us to drive adoption of optical solutions in AI applications. As we continue to push the boundaries of optical technologies, we’re also bringing together the supply chain, manufacturing, and testing and validation processes needed for customers to deploy these solutions at scale.”
Ayar Labs has combined silicon photonics with CMOS manufacturing processes to enable the use of optical interconnects in a chiplet form factor within multi-chip packages. This allows GPUs and other accelerators to communicate across a wide range of distances, from millimeters to kilometers, while effectively functioning as a single, giant GPU.
Join Ayar Labs at the Optical Fiber Communication Conference (OFC) booth (#2958) March 30-April 3, 2025, in San Francisco. The company will showcase its optical interconnect solutions for AI and how they will transform system-level implementations for AI scale-up architectures.
Explore how Ayar Labs’ optical I/O is revolutionizing AI system architectures in the Jabil booth (#5845) at OFC as well. See a model of a Jabil external laser source array for CPO (Co-Packaged Optics) featuring 64 Ayar Labs SuperNova light sources, powering up to a petabit per second of bi-directional bandwidth. This innovative design enables greater compute density per rack, enhances cooling efficiency, and supports hot-swap capability for reduced server downtime.
For a full list of Ayar Labs’ activities at OFC, visit the OFC web page for more information.
Statements of Support from UCIe Consortium Members:
Advanced Micro Devices (AMD)
“As the leader in chiplet technology, we are proud to continue our long history of supporting industry standards that drive innovation forward and create solutions to meet our customers’ and the industry’s needs,” said Mark Papermaster, chief technology officer and executive vice president, AMD. “The robust, open and vendor neutral chiplet ecosystem provided by UCIe is critical to meeting the challenge of scaling networking solutions to deliver on the full potential of AI. We’re excited that Ayar Labs is one of the first deployments that leverages the UCIe platform to its full extent.”
Advanced Semiconductor Engineering (ASE)
“Our ecosystem is deeply immersed in the development of interoperable chiplet solutions to support the rapid progress towards tomorrow’s AI infrastructure and accelerated compute requirements,” said Dr. CP Hung, Vice President of Research & Development, ASE, Inc. “UCIe is playing a significant role, and through fostering interoperability and collaboration, it is driving standards that elevate efficiency and performance. ASE commends Ayar Labs’ contribution to the CPO momentum with the world’s first UCIe optical I/O chiplet.”
Alphawave Semi
“Alphawave Semi is proud to be a leader in advancing novel optical interconnect solutions that drive the future of AI infrastructure with Ayar Labs. This groundbreaking achievement will be the first instance of multi-vendor, multi-foundry UCIe subsystem silicon interoperability targeted for optical connectivity, enabling unparalleled performance in AI scale-up architectures. The seamless integration with AlphaCHIP1600-IO, our 1.6Tb electrical I/O chiplet, will eliminate data bottlenecks and enhance system efficiency built on a foundation of our best-in-class low latency and power efficient UCIe IP.” Letizia Giuliano, Vice President of Product Marketing and Management
d-Matrix
“d-Matrix is building inference AI accelerators for the datacenter market using 2D/3D chiplet technology that dramatically improves interactivity and throughput,” said Sid Sheth, Founder & CEO of d-Matrix. “Optical connectivity is critical to solving network bottlenecks as we scale-out our compute accelerators. The chiplet ecosystem depends on open standards and accessible products, and we are excited to see Ayar Labs bring the first UCIe optical chiplet to market.”
GlobalFoundries
“As the industry transitions to a chiplet-based approach to system partitioning, the UCIe interface for chiplet-to-chiplet communication is rapidly becoming a de facto standard,” said Kevin Soukup, senior vice president of GlobalFoundries’ silicon photonics product line. “We are excited to see Ayar Labs demonstrating the UCIe standard over an optical interface, a pivotal technology for scale-up networks. This accomplishment, uniquely enabled by our monolithic GF Fotonix™ platform, underscores the essential role of silicon photonics in driving highly energy efficient transmission of high-speed data over long distances while maintaining compatibility with chiplet-based standards.”
TSMC
“Co-packaged optical (CPO) chiplets are set to transform the way we address data bottlenecks in large-scale AI computing. The availability of UCIe optical chiplets will foster a strong ecosystem, ultimately driving both broader adoption and continued innovation across the industry,” said Lucas Tsai, Vice President of Business Management at TSMC North America. “TSMC will continue our partnership with innovators like Ayar Labs to deliver CPO solutions with our silicon photonics technology, Compact Universal Photonic Engine (COUPE™), supporting the explosive growth in data transmission fueled by the AI boom.”
UCIe Consortium
“The advancement of the UCIe standard marks significant progress toward creating more integrated and efficient AI infrastructure thanks to an ecosystem of interoperable chiplets,” said Dr. Debendra Das Sharma, Chair, UCIe Consortium. “By fostering interoperability and collaboration among vendors, UCIe provides the foundation to meet the growing demands for greater bandwidth and energy efficiency. It is incredibly encouraging to see Ayar Labs contribute to this momentum with this UCIe optical I/O chiplet.”
