CAMPBELL, Calif. – April 30, 2025 – Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced that it has joined Intel Foundry Accelerator Ecosystem Alliance Program, as a member of both the IP Alliance and the recently announced Chiplet Alliance. This collaboration will help mutual customers design electronics using Intel Foundry’s advanced process technologies. In addition, it will also support increased interoperability and the advancements beyond traditional node scaling by growing the chiplet ecosystem.

Through these alliances, Arteris joins forces with Intel Foundry to empower engineering teams to achieve their design goals, optimize performance, power, and area (PPA), and stay on schedule when designing complex SoCs and chiplets. Driven by customer demand, Arteris will leverage its physically aware network-on-chip (NoC) IP and SoC integration automation technologies to ensure the design and integration of high-bandwidth, low-latency, power-efficient interconnects used as the data backbone across IPs in SoCs and interoperable multi-die systems implemented using Intel Foundry’s advanced semiconductor process technologies.

“Intel Foundry is pleased to welcome Arteris, a pioneer of NoC IP technology used in a broad range of applications, to our Intel Foundry Accelerator Ecosystem Alliance,” said Suk Lee, VP & GM of Ecosystem Technology Office, Intel Foundry. “By leveraging our advanced foundry technology capabilities through our IP and Chiplet Alliance programs, Arteris can further optimize its physically aware and highly interoperable NoC IPs used in SoCs and chiplets, accelerating backend convergence, interoperability, and silicon deployment to help drive success for our joint customers.”

“Our collaboration with Intel Foundry exemplifies Arteris’ dedication to helping customers achieve the best performance, shortest wire length with the lowest power, and smallest area possible on the most advanced silicon nodes,” said K. Charles Janac, president and CEO of Arteris. “By optimizing our NoC IP technologies and by providing interoperability in the chiplet ecosystem, we continue to enable designers to deliver on their PPA targets, IP and chiplet integration, and to meet project schedules.”