industry news
Subscribe Now

Accellera Board Approves Security Annotation for Electronic Design Integration Standard 1.0 for Release

New standard to identify security concerns for IP providers

Elk Grove, Calif., July 14, 2021 — Accellera Systems Initiative (Accellera), the electronics industry organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards, announced today that its Board of Directors has approved the Security Annotation for Electronic Design Integration (SA-EDI) Standard 1.0 for release. Developed by the IP Security Assurance (IPSA) Working Group, the new standard is available for immediate download at no cost.

The SA-EDI Standard defines a specification that documents security concerns for hardware IP and its associated components when integrated into an IC. With the new standard, IP providers can either identify security concerns to mitigate within their IP or disclose the concerns to their integrator. The standard is design, product, and tool independent. Users of the SA-EDI standard can provide consistent security collateral in a uniform format.

“There has been tremendous interest from the stakeholders in the development of a standard to address security concerns for hardware IP,” stated Lu Dai, Chair of Accellera. “I’d like to congratulate the IPSA Working Group on their efforts in getting this standard into the hands of IP providers concerned with tackling and reducing security risk.”

“I am very proud of the work our team has done to get this standard out into the community,” stated Brent Sherman, IPSA Working Group Chair. “To develop SA-EDI, we focused on using existing standards that pertain to IP specification, design, verification, and integration where security risk is a significant concern, as well as known security concerns. Using this information, we were able to develop a standard that is low overhead, non-disruptive, and scalable across multiple target implementations. I look forward to the feedback from the community as we continue to evolve the standard.”

More information and Background on SA-EDI:

Accellera has resources available to learn more about the SA-EDI Standard 1.0 and how it can help IP providers identify security concerns. For more information, including a recording of a workshop at virtual DVCon U.S. 2021, visit the IP Security Assurance Working Group page.

Join Accellera to help influence the ongoing development of the standard. More information about membership can be found on the website.

About Accellera

Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit www.accellera.org. Find out more about membership. Follow @accellera on Twitter and LinkedIn or to comment, please use #accellera. Accellera Global Sponsors are: Cadence, Siemens EDA, and Synopsys.

Leave a Reply

featured blogs
Jul 24, 2021
Many modern humans have 2% Neanderthal DNA in our genomes. The combination of these DNA snippets is like having the ghost of a Neanderthal in our midst....
Jul 23, 2021
The Team RF "μWaveRiders" blog series is a showcase for Cadence AWR RF products. Monthly topics will vary between Cadence AWR Design Environment release highlights, feature videos, Cadence... [[ Click on the title to access the full blog on the Cadence Community...
Jul 23, 2021
Synopsys co-CEO Aart de Geus explains how AI has become an important chip design tool as semiconductor companies continue to innovate in the SysMoore Era. The post Entering the SysMoore Era: Synopsys Co-CEO Aart de Geus on the Need for AI-Designed Chips appeared first on Fro...
Jul 9, 2021
Do you have questions about using the Linux OS with FPGAs? Intel is holding another 'Ask an Expert' session and the topic is 'Using Linux with Intel® SoC FPGAs.' Come and ask our experts about the various Linux OS options available to use with the integrated Arm Cortex proc...

featured video

DesignWare Controller and PHY IP for PCIe 6.0

Sponsored by Synopsys

See a demo of Synopsys’ complete IP solution for PCIe 6.0 technology showing the controller operating at 64GT/s in FLIT mode and the PAM-4 PHY in 5-nm process achieving two orders of magnitude better BER with 32dB PCIe channel.

Click here for more information about DesignWare IP for PCI Express (PCIe) 6.0

featured paper

Harnessing the Power of Data to Enhance Quality of Life for Seniors

Sponsored by Maxim Integrated

This customer testimonial highlights the CarePredict digital health platform. Its main device, the Tempo wearable, uses artificial intelligence to derive actionable insights to enhance care and quality of life for seniors.

Click to read more

featured chalk talk

Medical Device Security

Sponsored by Siemens Digital Industries Software

In the new era of connected medical devices, securing embedded systems has become more important than ever. But, there is a lot medical device designers can borrow from current best-practices for embedded security in general. In this episode of Chalk Talk, Amelia Dalton chats with Robert Bates from Mentor about strategies and challenges for securing modern medical devices and systems.

Click here to download the whitepaper, "Medical Device Security: Achieving Regulatory Approval"