industry news
Subscribe Now

Synopsys Announces Availability of Logic Library and Embedded Memory IP for Mie Fujitsu Semiconductor 40-nm Low-Power Process

Synopsys, Inc. (Nasdaq:SNPS) today announced the availability of DesignWare® Logic Library and Embedded Memory IP for the Mie Fujitsu Semiconductor 40-nanometer low-power (40LP) process. Designers using the Mie Fujitsu Semiconductor 40LP process can integrate DesignWare Logic Library and Embedded Memory IP to optimize the power efficiency and performance of their designs. The IP is made available through Synopsys’ Foundry-Sponsored IP Program, which enables designers to license the DesignWare Logic Library and Embedded Memory IP at no cost.

“The availability of DesignWare Logic Library and Embedded Memory IP on the Mie Fujitsu Semiconductor 40LP process enables our mutual customers to reduce design risk,” said Masahiro Chijiiwa, director and corporate executive officer, (technology development), Mie Fujitsu Semiconductor. “The combination of our 40LP process and Synopsys’ comprehensive portfolio of logic libraries and embedded memories enables designers to speed SoC development and quickly ramp to volume production.”

DesignWare Logic Libraries give engineers the ability to optimize their entire SoC design for speed and energy efficiency by including 9-track high-density and 12-track high-speed libraries with long channels, and power optimization kits to reduce power consumption. High-speed, high-density and low-voltage DesignWare Embedded Memories offer multiple power management modes including light sleep, deep sleep and shutdown-with-retention to enable designers to meet aggressive power targets and extend the battery life of their products.

“As the leading supplier of physical IP, Synopsys provides designers with silicon-proven logic library and embedded memory IP that supports a range of process technologies for leading foundries,” said John Koeter, vice president of marketing for IP and prototyping at Synopsys. “By offering DesignWare Logic Library and Embedded Memory IP for Mie Fujitsu Semiconductor’s 40LP process, Synopsys enables designers to incorporate necessary low-power features for longer battery life in their mobile and consumer products.”

Availability

The DesignWare Logic Libraries and Embedded Memories supporting Mie Fujitsu Semiconductor’s 40LP process are now available at no cost to qualified licensees as part of Synopsys’ Foundry-Sponsored IP Program.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys’ IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys’ extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit http://www.synopsys.com/designware.

About Synopsys

Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world’s 16th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP, and is also growing its leadership in software quality and security solutions. Whether you’re a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

Leave a Reply

featured blogs
Apr 24, 2026
A thought experiment in curiosity, confusion, and cosmic consequences....

featured paper

Quickly and accurately identify inter-domain leakage issues in IC designs

Sponsored by Siemens Digital Industries Software

Power domain leakage is a major IC reliability issue, often missed by traditional tools. This white paper describes challenges of identifying leakage, types of false results, and presents Siemens EDA’s Insight Analyzer. The tool proactively finds true leakage paths, filters out false positives, and helps circuit designers quickly fix risks—enabling more robust, reliable chip designs. With detailed, context-aware analysis, designers save time and improve silicon quality.

Click to read more

featured chalk talk

Nexperia GaN Power Proliferating in All Things Motor Control/Drive
Sponsored by Mouser Electronics and Nexperia
In this episode of Chalk Talk, Art Gonsky from Nexperia and Amelia Dalton discuss the biggest challenges of electric motors and controllers and how GaN power solutions can help solve these issues. They  also investigate how silicon, silicon carbide and GaN power solutions compare and how Nexperia and NXP technologies can get your next motor control design up and running in no time!     
Mar 25, 2026
29,507 views