MOUNTAIN VIEW, Calif., Oct. 20, 2014 /PRNewswire/ —
- Extends the award-winning DesignWare STAR Memory System to support embedded flash memories
- Provides comprehensive test coverage and in-field diagnostics of the failure mechanisms associated with embedded flash memories
- Eliminates the need for expensive external test solutions for embedded flash memories
- Reduces overall design integration effort, development cycle and test cost
- Leverages STAR Memory System Silicon Browser and Yield Accelerator for more efficient SoC bring-up and faster time-to-volume
Synopsys, Inc. (Nasdaq:SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today introduced the DesignWare® STAR Memory System® for Embedded Flash product, the industry’s first integrated memory test and repair solution with test algorithms optimized for on-chip embedded flash memories. The DesignWare STAR Memory System is an automated pre- and post-silicon memory test, diagnostic and repair solution that enables designers to improve test coverage, reduce design time, lower test costs and maximize manufacturing yield. The STAR Memory System for Embedded Flash is a built-in self-test (BIST) solution that tests for the failure mechanisms associated with embedded flash memories, reducing overall integration time and cutting associated test costs by 20 percent compared to external solutions. Embedded flash memories are increasingly used with microcontrollers in system-on-chips (SoCs) for Internet of Things (IoT) wearables, smart appliances and automotive safety systems, which have stringent cost and reliability requirements.
“Synopsys’ DesignWare STAR Memory System for Embedded Flash is a valuable product for chip designers utilizing our highly popular 55-nanometer process, which has already been widely adopted for numerous IoT applications,” said Shih Chin Lin, senior director of IP development and design support division at UMC. “This solution provides our mutual customers with integrated test and repair capabilities that reduce overall design effort and lower test costs. Designers who are taking advantage of our 55-nanometer eFlash process will find that the post-silicon debug and analysis capabilities of Synopsys’ Yield Accelerator and Silicon Browser will make designers’ product characterization and validation efforts even more efficient.”
The STAR Memory System for Embedded Flash offers in-field diagnostic capabilities to identify issues during system operation. With these capabilities, memory issues can be diagnosed even after the devices have shipped to the end customer.
The STAR Memory System allows hierarchical generation and verification of the test and repair IP to be inserted into the SoC while maintaining the original design hierarchy. This can reduce integration effort and SoC development time by allowing reuse of existing design constraints and configuration files. Additionally, the post-silicon Yield Accelerator and Silicon Browser features can reduce the time required for silicon bring-up and defect analysis for yield optimization, enabling the ramp to volume production to occur in weeks rather than months. Used in billions of chips, the STAR Memory System is a two-time winner of Test & Measurement World’s prestigious “Best in Test” Award.
“SoC designers for IoT and automotive devices must implement cost-effective features that enable efficient test and diagnostics for the full life cycle of their products,” said John Koeter, vice president of marketing for IP and prototyping at Synopsys. “Testing embedded flash memories has historically required expensive external test solutions. With STAR Memory System for Embedded Flash, designers can reduce their test cost and development schedules, getting their products to market faster.”
The DesignWare STAR Memory System for Embedded Flash is available now for UMC’s 55-nanometer process.
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes complete interface IP solutions consisting of controller, PHY and next-generation verification IP, analog IP, embedded memories, logic libraries, processor solutions and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys’ IP Accelerated initiative offers IP prototyping kits, IP software development kits and customized IP subsystems for rapid integration of IP into SoCs. Synopsys’ extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit http://www.synopsys.com/designware.
Synopsys, Inc. (Nasdaq:SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, Synopsys delivers software, IP and services to help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems. Learn more athttp://www.synopsys.com.