industry news
Subscribe Now

Synapse Design tapes out 33 SOCs in 12 months

San Jose, Calif. – June 25, 2014 – Synapse Design today announced that, together with its top tier semiconductor and systems customers, the Company has taped out 33 SOCs in 12 months and 20 SOCs in the first six months of 2014. These SOCs address applications in the automotive, multimedia, mobile, data storage, networking and Internet-of-Things (IoT) markets.

The 33rd SOC is a 200 sq. mm die developed for the networking market. This complex SOC design includes more than 30 blocks; digital, analog and mixed signal content; and has a 1Ghz high-speed interface.

“Our ability to complete so many designs is a testament to our talented, experienced engineering staff together with our proprietary automated flow, tools and IP that are responsible for our ‘zero respin’ success for the past several years,” said Satish Bagalkotkar, co-founder, CEO and president. “Our customers look to us to partner in their product success and advise not only on current projects but on derivative products and next-generation products.”

As process technology has advanced to new challenging nodes and SOC complexity grows, Synapse Design has experienced a trend toward client demands for an increasing level of Synapse Design engineering involvement. In over 30 percent of the tapeouts during the past year, Synapse Design has delivered complete turnkey services from RTL to GDSII. In 40 percent of the tapeouts, Synapse Design provided more than 50 percent of the design implementation work. In the final 30 percent of design projects, the Company provided customers with additional resources allowing them to easily expand resources for pressing projects.

“Many of the largest semiconductor and system companies will generate fewer than a handful of new IC designs each year, while we work on dozens,” said Devesh Gautam, co-founder and COO. “This continuous high-volume work flow allows us to constantly improve our products, processes and successful results. This provides us and our customers with a tremendous advantage over the typically small design services houses.”

Synapse Design has more than 700 engineers solving SOC and ASIC challenges, including analog mixed-signal content, advanced process nodes including FinFET, hardening ARM cores for Power-Performance-Area (PPA) advantage and creating embedded software, including domain-specific software. With seven designs centers across the globe, customers have access to “best location/best related expertise” resources.

About Synapse Design

Synapse Design is the industry leader in design services for highly complex SOCs and ASICs and is the engineering backbone of many top tier semiconductor and systems companies around the world. The Company’s products and services support companies creating high-end products in the storage, wireless/mobile, networking/computing, and multimedia industries. Through its people, products, technologies and services, the Company delivers engineering excellence and a flexible business model enabling next generation products for its customers. Founded in 2003 and headquartered in the Silicon Valley, the Company maintains global reach to high-technology centers of the world, serving customers locally from offices in the U.S., Europe, China, India and Taiwan.

 

Learn more about Synapse Design at http://www.synapse-da.com

Leave a Reply

featured blogs
Apr 24, 2026
A thought experiment in curiosity, confusion, and cosmic consequences....

featured paper

Quickly and accurately identify inter-domain leakage issues in IC designs

Sponsored by Siemens Digital Industries Software

Power domain leakage is a major IC reliability issue, often missed by traditional tools. This white paper describes challenges of identifying leakage, types of false results, and presents Siemens EDA’s Insight Analyzer. The tool proactively finds true leakage paths, filters out false positives, and helps circuit designers quickly fix risks—enabling more robust, reliable chip designs. With detailed, context-aware analysis, designers save time and improve silicon quality.

Click to read more

featured chalk talk

Connecting the World Through Space
Sponsored by Mouser Electronics and Qorvo
In this episode of Chalk Talk, Ryan Jennings from Qorvo and Amelia Dalton explore the critical components and design challenges inherent in LEO satellite infrastructure and how Qorvo’s solutions are enabling the next generation of space-based connectivity. 
Mar 30, 2026
26,092 views