industry news
Subscribe Now

STMicroelectronics and Memoir Systems Combine Breakthrough Memory and Semiconductor Process Technologies

Geneva, November 6, 2013  – STMicroelectronics (NYSE: STM), a global semiconductor leader serving customers across the spectrum of electronics applications, announced today its close collaboration with Memoir Systems has made the revolutionary Algorithmic Memory Technology available for embedded memories in application-specific integrated circuits (ASICs) and Systems on Chips (SoCs) manufactured in ST’s fully-depleted silicon-on-insulator (FD-SOI) process technology. 

When integrated into products made using ST’s FD-SOI, Memoir’s Algorithmic Memories deliver uncompromised performance as a result of FD-SOI’s recognized power and performance advantages[1]. Moreover, combining FD-SOI’s extremely low Soft Error Rate[2] and ultra-low leakage currents creates a uniquely compelling value proposition for mission-critical applications, including networking, transportation, medical, and aerospace programs. 

“On its own, FD-SOI process technology produces ASICs and SoCs that run faster and cooler than devices built from alternative process technologies,” said Philippe Magarshack, Executive Vice President, Design Enablement and Services, STMicroelectronics. “In adding outstanding third-party intellectual property from Memoir Systems, we are making FD-SOI even more appealing and demonstrating how simple porting is.”

“With our commitment to breakthrough memory technology, accelerated design times, and extreme high-performance, making our best-in-class Algorithmic Memory Technology available on FD-SOI was important to us and our customers, “said Sundar Iyer, co-founder and CEO at Memoir Systems. “The ease of porting, together with the performance we’ve seen, confirms that FD-SOI is faster, cooler, and simpler.”

A leading manufacturer of ASICs, ST is the first semiconductor supplier to make available the exciting fully-depleted silicon-on-insulator (FD-SOI) process technology that extends and simplifies existing planar, bulk-silicon manufacturing approaches. An FD-SOI transistor operates at higher frequencies than equivalent transistor manufactured using bulk CMOS because of improved transistor electrostatic characteristics and a shorter channel length.

[1] Products manufactured in FD-SOI have been found to produce as much as 30% faster performance and as much as 30% greater energy efficiency when compared with the same products manufactured in bulk technology.

2 SER is 50 to 100 times better than equivalent Bulk, measured below 10 FIT/Mb (Failure-in-Time or failures per billion-chip hours).

About STMicroelectronics

ST is a global leader in the semiconductor market serving customers across the spectrum of sense and power and automotive products and embedded processing solutions. From energy management and savings to trust and data security, from healthcare and wellness to smart consumer devices, in the home, car and office, at work and at play, ST is found everywhere microelectronics make a positive and innovative contribution to people’s life. By getting more from technology to get more from life, ST stands for life.augmented.

 

In 2012, the Company’s net revenues were $8.49 billion. Further information on ST can be found at www.st.com.

Leave a Reply

featured blogs
May 2, 2024
I'm envisioning what one of these pieces would look like on the wall of my office. It would look awesome!...
Apr 30, 2024
Analog IC design engineers need breakthrough technologies & chip design tools to solve modern challenges; learn more from our analog design panel at SNUG 2024.The post Why Analog Design Challenges Need Breakthrough Technologies appeared first on Chip Design....

featured video

Why Wiwynn Energy-Optimized Data Center IT Solutions Use Cadence Optimality Explorer

Sponsored by Cadence Design Systems

In the AI era, as the signal-data rate increases, the signal integrity challenges in server designs also increase. Wiwynn provides hyperscale data centers with innovative cloud IT infrastructure, bringing the best total cost of ownership (TCO), energy, and energy-itemized IT solutions from the cloud to the edge.

Learn more about how Wiwynn is developing a new methodology for PCB designs with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver.

featured paper

Achieve Greater Design Flexibility and Reduce Costs with Chiplets

Sponsored by Keysight

Chiplets are a new way to build a system-on-chips (SoCs) to improve yields and reduce costs. It partitions the chip into discrete elements and connects them with a standardized interface, enabling designers to meet performance, efficiency, power, size, and cost challenges in the 5 / 6G, artificial intelligence (AI), and virtual reality (VR) era. This white paper will discuss the shift to chiplet adoption and Keysight EDA's implementation of the communication standard (UCIe) into the Keysight Advanced Design System (ADS).

Dive into the technical details – download now.

featured chalk talk

Improving Chip to Chip Communication with I3C
Sponsored by Mouser Electronics and Microchip
In this episode of Chalk Talk, Amelia Dalton and Toby Sinkinson from Microchip explore the benefits of I3C. They also examine how I3C helps simplify sensor networks, provides standardization for commonly performed functions, and how you can get started using Microchips I3C modules in your next design.
Feb 19, 2024
10,837 views