industry news
Subscribe Now

Nallatech Packs Altera Stratix V FPGA, Dual SFP+ and DDR3 SDRAM into Low-Profile, PCIe Gen 3 Network Processing Card

Camarillo, Calif. — March 29, 2012 – Nallatech, a leading supplier of high-performance FPGA solutions, announces the availability of the PCIe-385N. This FPGA network processing card delivers Altera Stratix V Series performance with PCI Express 8-lane Gen3 bandwidth in a ‘low profile’ half-height, half-length PCIe card.

The Nallatech PCIe-385N features a simple yet powerful architecture ideally suited for real-time network processing and algorithm-acceleration applications, including network monitoring, analytics, filtering, and data retention.

“The use of FPGA technology to accelerate network processing applications is a high growth area,” said Allan Cantle, president and founder of Nallatech.  “The PCIe-385N was designed from the ground up to be a high-performance, cost-effective, network processing platform capable of offloading processor-intensive tasks.” 

Technical Information

  • Support for several FPGAs within Altera’s latest Stratix V family. 
  • A PCIe Gen3 8-lane bus provides high bandwidth communications to the host processor.
  • The FPGA is directly coupled to two SFP+ ports supporting 1GbE, 10GbE, 10G SONET and various OTU standards up to 2f. 
  • The PCIe-385N features 2 banks of DDR3 SDRAM providing up to 16GBytes directly coupled to the Stratix V FPGA.
  • The compact form factor is the same size as a standard network card, allowing for easy integration into leading server platforms.

Availability

Nallatech has delivered first prototypes and is accepting orders for production units with delivery in Q3 2012. For further product details and availability information, please visit www.nallatech.com.

Leave a Reply

featured blogs
Mar 9, 2026
What happens to our digital history when the world's biggest archive of retro video games disappears?...

featured video

Cadence Chiplets Solutions | Helping you realize your chiplet ambitions

Sponsored by Cadence Design Systems

In this webinar, David Glasco, VP of Compute Solutions at Cadence, discusses how Cadence enables customers to transition from traditional monolithic SoC architectures to modular, scalable chiplet-based solutions, essential for meeting the growing demands of physical AI applications and high-performance computing.

Read eBook: Helping You Realize Your Chiplet Ambitions

featured chalk talk

EU Cyber Resilience Act Compliance Simplified with Infineon Security Solutions
Sponsored by Mouser Electronics and Infineon
In this episode of Chalk Talk, Preeti Khemani from Infineon and Amelia Dalton investigate the scope, categories, and standards included in the EU Cyber Resilience Act. They also explore the timelines associated with the EU Cyber Resilience Act and discuss how Infineon is streamlining compliance to ensure your next design meets CRA requirements.
Mar 10, 2026
1,383 views