industry news
Subscribe Now

Calypto Delivers Bus Interface Libraries to Easily Connect High Level Synthesis Models to ARM Platform

SANTA CLARA, Calif., – February 27, 2012 – Calypto® Design Systems, Inc., the leader in Electronic System Level (ESL) hardware design and Register Transfer Level (RTL) power optimization, today announced bus interface libraries that connect hardware subsystems implemented with Calypto’s High Level Synthesis product (HLS), Catapult® Synthesis, with AMBA® AXI™ bus interfaces. The libraries include master and slave interfaces with both Transaction Level Modeling (TLM) and HLS views, which allows easy interplay between a TLM 2.0 platform and HLS implementation flow without degrading simulation performance or hardware quality. The highly parameterizable AXI interface supports a wide range of configurations including burst modes, bus width and auxiliary control signals. 

 “The AXI interfaces are the first in a series of libraries in development at Calypto that will make Catapult C more readily available to mainstream designers,” said Shawn McCloud, Vice President of Marketing at Calypto. “They are written entirely in SystemC and tuned through the Catapult C synthesis tool. These interfaces are a great example of the benefits of mixing cycle accurate SystemC for control with abstract SystemC/C++ to implement a hardware subsystem.”

The AXI interface library is tuned so the resulting hardware is optimized for the user’s specific performance requirements, configuration mode and target technology. Availability in April, please contact Calypto Sales for specific pricing and information.

About Calypto’s Products

Catapult High Level Synthesis, Calypto’s SLEC® (Sequential Logic Equivalence Checking) and PowerPro® platforms are used by seven out of the top ten semiconductor companies and over 100 leading consumer electronics companies worldwide. Calypto’s products enable electronic system level design by engineers to dramatically improve design quality and reduce power consumption of their system-on-chip (SOC) devices.

About Calypto

Calypto® Design Systems, Inc. is the leader in ESL hardware design and RTL power optimization.

Calypto, whose customers include Fortune 500 companies worldwide, is a member of the ARM Connected Community, Cadence Connections program, the IEEE?SA, Synopsys SystemVerilog Catalyst Program, the Mentor Graphics OpenDoor program, Si2 and is an active participant in the Power Forward Initiative. Calypto has offices in Europe, India, Japan and North America.

More information can be found at www.calypto.com.

Leave a Reply

featured blogs
Apr 24, 2026
A thought experiment in curiosity, confusion, and cosmic consequences....

featured paper

Quickly and accurately identify inter-domain leakage issues in IC designs

Sponsored by Siemens Digital Industries Software

Power domain leakage is a major IC reliability issue, often missed by traditional tools. This white paper describes challenges of identifying leakage, types of false results, and presents Siemens EDA’s Insight Analyzer. The tool proactively finds true leakage paths, filters out false positives, and helps circuit designers quickly fix risks—enabling more robust, reliable chip designs. With detailed, context-aware analysis, designers save time and improve silicon quality.

Click to read more

featured chalk talk

Analog Output, Isolated Current, & Voltage Sensing Using Isolation Amplifiers
Sponsored by Mouser Electronics and Vishay
In this episode of Chalk Talk, Simon Goodwin from Vishay and Amelia Dalton chat about analog output, and isolated current and voltage sensing using isolation amplifiers. Simon and Amelia also explore the fundamental principles of current and voltage sensing and the variety of voltage and current sensing solutions offered by Vishay that can get your next design up and running in no time.
Apr 27, 2026
1,549 views