industry news
Subscribe Now

Global Unichip’s USB 3.0 Device Controller IP Passes USB-IF Test Procedure for SuperSpeed Products

HSINCHU, Taiwan, Nov. 29, 2011 /PRNewswire/ — Global Unichip Corp. (GUC), the Flexible ASIC Leader™, today announced that its USB 3.0 Device Controller IP has passed the USB-IF Test Procedure for SuperSpeed products and is now listed in the Integrator List.

The USB 3.0 Device Controller IP supports SuperSpeed USB peripheral functionality that provides a 10x data transfer rate over Hi-Speed USB.  It is backward compatible with USB 2.0 to ensure interoperability with billions of USB products already on the market.

GUC’s USB 3.0 Device Controller IP is highly configurable and employs an aggressive power saving methodology. It is compatible with USB 3.0 PHYs, including GUC’s own USB 3.0 PHY IP, through a standard PIPE interface.  GUC’s USB 3.0 PHY IP is currently under silicon characterization and expects to pass the complete USB-IF test by the first quarter of 2012.

The new USB 3.0 Device Controller IP is the latest addition to GUC’s library of high quality digital, analog and mixed-signal IP. With GUC’s silicon-proven USB 3.0 IP, designers can achieve reduced design time and guaranteed quality when developing products for advanced computing, entertainment, and networking applications.

“Our goal is to provide today’s designers with the a broad custom and third party IP portfolio that includes the specific macros they need to bring their next innovative idea to reality,” said Dr. Jen-Tai Hsu, Senior Director of Engineering, GUC.”

About GUC

GLOBAL UNICHIP CORP. (GUC) is the Flexible ASIC Leader™ whose customers target IC devices to leading edge computing, communications and consumer applications.  Based in Hsin-chu, Taiwan GUC has developed a global reputation with a presence in China, Europe, Japan, Korea, and North America.  GUC is publicly traded on the Taiwan Stock Exchange under the symbol 3443.  The company is a member of USB-IF.

Leave a Reply

featured blogs
Apr 24, 2026
A thought experiment in curiosity, confusion, and cosmic consequences....

featured paper

Want early design analysis without simulation?

Sponsored by Siemens Digital Industries Software

Traditional verification methods are failing today's complex IC designs, which require a proactive, early-stage analysis approach. A shift-left methodology addresses IP block integration challenges and the limitations of traditional simulation and ERC tools. Insight Analyzer detects hard-to-find leakage issues across power domains, enabling early analysis without full simulation. Identify inefficiencies earlier to reduce rework, improve reliability, and enhance power performance.

Click to read more!

featured chalk talk

What’s Driving Zephyr’s Momentum
In this episode of Chalk Talk, Brendon Slade from NXP and Amelia Dalton explore what Zephyr makes unique, how it compares to other RTOS options, and how its design philosophy enables developers to scale from simple prototypes to production-ready systems with confidence.
May 4, 2026
688 views