industry news
Subscribe Now

Synopsys Delivers Unified Solution for Digital and Custom SoC Designs

MOUNTAIN VIEW, Calif., Sept. 26, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced advances in its Galaxy™ Implementation Platform with the availability of its unified solution for mixed-signal designs. The new unified solution provides seamless integration between IC Compiler physical implementation and the Galaxy Custom Designer® solution, allowing design teams to easily move between digital and custom implementation flows while maintaining design data integrity. The unified solution accelerates the design development cycle by enabling quick and reliable custom edits to IC Compiler designs at any stage of development, including the time-critical tapeout phase.

“To manage complexity and reduce the development times of our mixed-signal designs, we need a unified methodology for digital and analog implementation,” said Didier-Jerome Martin, physical implementation manager at STMicroelectronics’ Microcontroller Division. “Using Synopsys’ unified physical implementation solution on a 32-bit microcontroller design we reduced the cycle time by 25 percent from initial floorplanning to final tapeout, as compared to our previous flow. We also experienced a 2X productivity gain when performing late-stage layout ECOs, at a time in the project when schedules were compressed and time was at a premium.”

Traditionally, digital place-and-route users have had to manually transfer their designs to a non-integrated custom editing tool to make analog-style changes. This method sacrifices productivity, introduces the risk of losing metadata in the process, and lacks the ability to readily assess the impact of custom edits on the overall design. The new unified IC Compiler and Custom Designer solution provides a powerful capability to perform custom editing of IC Compiler designs throughout the physical implementation flow, including floorplanning, placement, clock tree synthesis, routing and chip finishing. Virtually no setup is required, and the lossless, multi-roundtrip capability gives users a high degree of flexibility to make custom edits to the design while ensuring that all changes are reflected back into IC Compiler.

IC Compiler customers can now take advantage of Custom Designer’s advanced productivity features such as SmartDRD technology for design-rule-driven layout, interactive point-to-point auto-routing, and automation technologies such as auto-bus and auto-via generation. All this comes with push-button access to the same IC Validator physical verification and StarRC™ parasitic extraction tools used with IC Compiler, providing designers with a unified physical implementation solution.

“Designing today’s digital and mixed-signal SoCs involves multiple iterations between digital and custom implementation,” said Bijan Kiani, vice president of product marketing at Synopsys. “The new innovations in the Galaxy Platform provide the capabilities needed by design teams to manage the increased complexity and aggressive development schedules of complex mixed-signal designs.”

Synopsys will premiere a webinar entitled “Use IC Compiler and Custom Designer to Shave Weeks Off Your SoC Development Cycle” on October 19, 2011 at 10:00 a.m. (PT) that will showcase the seamless integration between IC Compiler and Custom Designer. Visit http://www.customdesigner.com to view a video demonstration and learn more about the IC Compiler and Custom Designer solution.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Leave a Reply

featured blogs
Apr 19, 2024
In today's rapidly evolving digital landscape, staying at the cutting edge is crucial to success. For MaxLinear, bridging the gap between firmware and hardware development has been pivotal. All of the company's products solve critical communication and high-frequency analysis...
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...
Apr 18, 2024
See how Cisco accelerates library characterization and chip design with our cloud EDA tools, scaling access to SoC validation solutions and compute services.The post Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud appeared first on Chip Design....

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured chalk talk

Intel AI Update
Sponsored by Mouser Electronics and Intel
In this episode of Chalk Talk, Amelia Dalton and Peter Tea from Intel explore how Intel is making AI implementation easier than ever before. They examine the typical workflows involved in artificial intelligence designs, the benefits that Intel’s scalable Xeon processor brings to AI projects, and how you can take advantage of the Intel AI ecosystem to further innovation in your next design.
Oct 6, 2023
25,119 views