industry news
Subscribe Now

Synopsys Delivers Unified Solution for Digital and Custom SoC Designs

MOUNTAIN VIEW, Calif., Sept. 26, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced advances in its Galaxy™ Implementation Platform with the availability of its unified solution for mixed-signal designs. The new unified solution provides seamless integration between IC Compiler physical implementation and the Galaxy Custom Designer® solution, allowing design teams to easily move between digital and custom implementation flows while maintaining design data integrity. The unified solution accelerates the design development cycle by enabling quick and reliable custom edits to IC Compiler designs at any stage of development, including the time-critical tapeout phase.

“To manage complexity and reduce the development times of our mixed-signal designs, we need a unified methodology for digital and analog implementation,” said Didier-Jerome Martin, physical implementation manager at STMicroelectronics’ Microcontroller Division. “Using Synopsys’ unified physical implementation solution on a 32-bit microcontroller design we reduced the cycle time by 25 percent from initial floorplanning to final tapeout, as compared to our previous flow. We also experienced a 2X productivity gain when performing late-stage layout ECOs, at a time in the project when schedules were compressed and time was at a premium.”

Traditionally, digital place-and-route users have had to manually transfer their designs to a non-integrated custom editing tool to make analog-style changes. This method sacrifices productivity, introduces the risk of losing metadata in the process, and lacks the ability to readily assess the impact of custom edits on the overall design. The new unified IC Compiler and Custom Designer solution provides a powerful capability to perform custom editing of IC Compiler designs throughout the physical implementation flow, including floorplanning, placement, clock tree synthesis, routing and chip finishing. Virtually no setup is required, and the lossless, multi-roundtrip capability gives users a high degree of flexibility to make custom edits to the design while ensuring that all changes are reflected back into IC Compiler.

IC Compiler customers can now take advantage of Custom Designer’s advanced productivity features such as SmartDRD technology for design-rule-driven layout, interactive point-to-point auto-routing, and automation technologies such as auto-bus and auto-via generation. All this comes with push-button access to the same IC Validator physical verification and StarRC™ parasitic extraction tools used with IC Compiler, providing designers with a unified physical implementation solution.

“Designing today’s digital and mixed-signal SoCs involves multiple iterations between digital and custom implementation,” said Bijan Kiani, vice president of product marketing at Synopsys. “The new innovations in the Galaxy Platform provide the capabilities needed by design teams to manage the increased complexity and aggressive development schedules of complex mixed-signal designs.”

Synopsys will premiere a webinar entitled “Use IC Compiler and Custom Designer to Shave Weeks Off Your SoC Development Cycle” on October 19, 2011 at 10:00 a.m. (PT) that will showcase the seamless integration between IC Compiler and Custom Designer. Visit http://www.customdesigner.com to view a video demonstration and learn more about the IC Compiler and Custom Designer solution.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Leave a Reply

featured blogs
May 12, 2021
The ICADVM20.1 ISR18 and IC6.1.8 ISR18 production releases are now available for download at Cadence Downloads . For information on supported platforms and other release compatibility information,... [[ Click on the title to access the full blog on the Cadence Community site...
May 11, 2021
Human vision in indispensable and often taken for granted. Similarly machine, or embedded, vision influences daily human life in ways thought impossible. Simply, machine vision refers to the ability of embedded systems to “see”. Key system components include camer...
May 6, 2021
Learn how correct-by-construction coding enables a more productive chip design process, as new code review tools address bugs early in the design process. The post Find Bugs Earlier Via On-the-Fly Code Checking for Productive Chip Design and Verification appeared first on Fr...
May 4, 2021
What a difference a year can make! Oh, we're not referring to that virus that… The post Realize Live + U2U: Side by Side appeared first on Design with Calibre....

featured video

The Verification World We Know is About to be Revolutionized

Sponsored by Cadence Design Systems

Designs and software are growing in complexity. With verification, you need the right tool at the right time. Cadence® Palladium® Z2 emulation and Protium™ X2 prototyping dynamic duo address challenges of advanced applications from mobile to consumer and hyperscale computing. With a seamlessly integrated flow, unified debug, common interfaces, and testbench content across the systems, the dynamic duo offers rapid design migration and testing from emulation to prototyping. See them in action.

Click here for more information

featured paper

How to solve two screenless TV design challenges

Sponsored by Texas Instruments

The new 4K display chipsets from DLP Products help make screenless TV setup easier and save cost by reducing the number of components required while also adding more advanced image-processing capabilities. The DLP471TP DMD and DLPC6540 controller for small designs and the DLP471TE DMD and DLPC7540 controller for designs above 1,500 lumens help deliver stunning ultra-high resolution displays to the market and take advantage of the rapid expansion in the availability of 4K content.

Click here to read

Featured Chalk Talk

General Port Protection

Sponsored by Mouser Electronics and Littelfuse

In today’s complex designs, port protection can be a challenge. High-speed data, low-speed data, and power ports need protection from ESD, power faults, and more. In this episode of Chalk Talk, Amelia Dalton chats with Todd Phillips from Littelfuse about port protection for your next system design.

Click here for more information about port protection from Littelfuse.