industry news
Subscribe Now

Lattice Announces Five New IP Suites For The LatticeECP3 FPGA Family

HILLSBORO, OR – FEBRUARY 7, 2011 – Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of five new comprehensive Intellectual Property (IP) Suites to accelerate the design of electronic systems in a variety of industries using the award winning LatticeECP3™ FPGA family.  These five IP suites are PCI Express, Ethernet Networking, Digital Signal Processing, Video & Display, and Value. 

Lattice IP Suites are economical packages of IP cores that allow designers to conveniently obtain critical functions for their applications.  The suites offer ready-made building blocks for solving a variety of problems, such as high-speed data transfer, Ethernet networking, high speed memory interfaces, digital signal processing and video pixel processing.  These comprehensive IP Suites empower design engineers to quickly build leading edge wireline, wireless, embedded, industrial, compute, video and display, and consumer systems. 

“We are pleased to offer our customers a portfolio of IP Suites for developing advanced, high performance applications in a variety of industries,” said Shakeel Peera, Director of Marketing for High Density Solutions at Lattice Semiconductor.  “Lattice is committed to providing a comprehensive silicon ecosystem that includes evaluation kits, reference designs, software tools and bundled IP cores so our customers can accelerate their time to market with new products.” 

Attractive Promotions and Availability

Lattice is offering a limited quantity promotion on a complete set of design tools to encourage customers to build their next generation systems with LatticeECP3 FPGAs.  The LatticeECP3 FPGA is the best-in-class mid-range FPGA in the industry, with high-caliber SERDES, full-featured DSP blocks and state-of-the-art DDR3 memory support.  The limited quantity promotion includes five IP Suites, the Lattice Diamond™ Design Software Subscription License, and the LatticeECP3 PCI Express Development Kit. 

The five IP Suites normally retail for an annual subscription fee of $995 each.  The Diamond Software Subscription License sells for an annual subscription fee of $895.  The limited numbers of IP Suites and Diamond Software Subscription Licenses are available for a promotional first year subscription of only $99 each.  In addition, for high-speed system design applications, Lattice is offering a promotion on its PCI Express Development Kit.  The versatile $895 Kit is available for only $499 during the limited quantity promotion.  Customers can select any combination of the promotions to build a design package suitable for their applications.  The promotions are only through the authorized Lattice distributors listed at www.latticesemi.com/sales

About the Lattice IP Suites

Lattice IP Suites are a family of interoperable LatticeCORE™ IP cores optimized for Lattice device architectures that enable various technology specific applications.  The IPexpress™ tool within the Lattice Diamond Design Environment allows customers to seamlessly access the latest IP Cores from the Lattice IP Server and configure them. All Lattice IP can be fully evaluated prior to the purchase.  In the free evaluation mode, customers can fully configure an IP, integrate it in their designs, perform full verification, and even run it in hardware for a limited time. Purchase of an annual node-locked IP Suite license enables the member IP to operate in hardware for an unlimited time.  The node-locked license can be used on multiple designs or projects over a one year period.  For more information about how Lattice IP Suites can bring value to design projects, please visit: www.latticesemi.com/IPSuites

About the LatticeECP3 PCI Express Development Kit

The components of the LatticeECP3 PCI Express Development Kit have been configured to work together to enable fast system evaluation and design.  With the help of easy step-by-step instructions, designers can expect to have a demo running in as little as 30 minutes, and a design validated in less than two hours.  Key features of the LatticeECP3 PCI Express development kit are:

  • A highly optimized, low cost PCI Express Solutions Board that enables both x1 and x4 endpoint evaluation and design.
  • A variety of demo executables – basic demo for control plane applications, throughput demo for high-bandwidth applications, color bar demo and an image transfer demo – that show how to address different design performance requirements.
  • IP Cores for evaluation – PCI Express Endpoint in x1 and x4 versions and Scatter Gather. 
  • Device drivers for Windows and Linux platforms. 

For more information visit: www.latticesemi.com/pciexpress-ecp3

About the Lattice Diamond Design Environment

Lattice Diamond FPGA design software is the new flagship design environment for Lattice FPGA products, including the award-winning LatticeECP3 FPGA Family.  Lattice Diamond software provides a complete set of powerful tools, efficient design flows and modern user interface that enables designers to more quickly target low power, cost sensitive FPGA applications.  In addition, Lattice Diamond software continues to provide industry-leading features specifically developed for low cost and low power applications.  These include a very accurate power calculator, pin based simultaneous switching output noise calculator, and proven MAP and PAR FPGA implementation algorithms that help ensure low cost and low power design solutions.  To learn more about the Lattice Diamond Design Environment, please visit: www.latticesemi.com/latticediamond

About the Lattice ECP3 FPGA Family

The LatticeECP3 FPGA family is comprised of the lowest power, SERDES-enabled FPGAs in the market today.  The family’s five FPGAs offer standards-compliant, multi-protocol 3.2G SERDES, DDR1/2/3 memory interfaces and high performance, cascadable DSP slices that are ideal for RF, baseband and image signal processing.  Toggling at 1Gbps, the LatticeECP3 FPGAs also feature fast LVDS I/O as well as embedded memory of up to 6.8 Mbits.  Logic density varies from 17K LUTs to 149K LUTs with up to 586 user I/O.  The LatticeECP3 FPGA family is ideally suited for deployment in high volume cost- and power-sensitive video camera and display, wireline and wireless infrastructure applications. 

About Lattice Semiconductor

Lattice is the source for innovative FPGAPLD, programmable Power Management and Clock Management solutions.  For more information, visit www.latticesemi.com.

Follow Lattice via FacebookRSS and Twitter

Leave a Reply

featured blogs
Nov 24, 2020
In our last Knowledge Booster Blog , we introduced you to some tips and tricks for the optimal use of the Virtuoso ADE Product Suite . W e are now happy to present you with some further news from our... [[ Click on the title to access the full blog on the Cadence Community s...
Nov 23, 2020
It'€™s been a long time since I performed Karnaugh map minimizations by hand. As a result, on my first pass, I missed a couple of obvious optimizations....
Nov 23, 2020
Readers of the Samtec blog know we are always talking about next-gen speed. Current channels rates are running at 56 Gbps PAM4. However, system designers are starting to look at 112 Gbps PAM4 data rates. Intuition would say that bleeding edge data rates like 112 Gbps PAM4 onl...
Nov 20, 2020
[From the last episode: We looked at neuromorphic machine learning, which is intended to act more like the brain does.] Our last topic to cover on learning (ML) is about training. We talked about supervised learning, which means we'€™re training a model based on a bunch of ...

featured video

Product Update: Broad Portfolio of DesignWare IP for Mobile SoCs

Sponsored by Synopsys

Get the latest update on DesignWare IP® for mobile SoCs, including MIPI C-PHY/D-PHY, USB 3.1, and UFS, which provide the necessary throughput, bandwidth, and efficiency for today’s advanced mobile SoCs.

Click here for more information about DesignWare IP for 5G Mobile

featured paper

Top 9 design questions about digital isolators

Sponsored by Texas Instruments

Looking for more information about digital isolators? We’re here to help. Based on TI E2E™ support forum feedback, we compiled a list of the most frequently asked questions about digital isolator design challenges. This article covers questions such as, “What is the logic state of a digital isolator with no input signal?”, and “Can you leave unused channel pins on a digital isolator floating?”

Click here to download the whitepaper

Featured Chalk Talk

Maxim's Himalaya uSLIC Portfolio

Sponsored by Mouser Electronics and Maxim Integrated

With form factors continuing to shrink, most engineers are working hard to reduce the number of discrete components in their designs. Power supplies, in particular, are problematic - often requiring a number of large components. In this episode of Chalk Talk, Amelia Dalton chats with John Woodward of Maxim Integrated about how power modules can save board space, improve performance, and help reliability.

Click here for more information about Maxim Integrated Himalaya uSLIC™ MAXM1546x Step-Down Power Modules