industry news
Subscribe Now

SymTA/S for Migration from Single-core to Multi-core ECU-Software on Infineon Microcontrollers

Braunschweig  –  20th November 2010.  Symtavision, one of the leading tool vendors for timing and scheduling analysis in the field of complex, safety and mission-critical embedded real-time systems, has announced that its scheduling analysis tool suite SymTA/S supports the systematic migration of hard real-time software from a single-core to a multi-core platform, in particular on microcontrollers of Infineon Technologies.  

The increasing performance requirements of embedded applications in the automotive domain often lead to multi-core approaches in order to reach the desired features at reasonable costs. The necessary migration of software from single-core to multi-core systems however raises several challenges.

The traditional approach is to modify software in small steps, and continuously check results. When porting software to multi-core architectures however, small steps may not always be feasible. The controller architecture is not only changed in terms of additional cores, but also in terms of supported clock rates, memory architecture, communication architecture or instructions of the cores, and therefore run-time may change considerably. The new architecture may require new compiler versions and operating systems, again possibly influencing the run- time behaviour.

Major questions for developers in the migration process are:

How shall the user map and partition software, using the existing hardware resources efficiently? What are actually the metrics for a successful transition from a single-core application to a multi-core application? How does the analysis of the runtime behaviour work and how is it affected, are deadlines still fulfilled by the software?

The decision, which runnables should be mapped to which cores and which data containers lay in which memories, is strongly influenced by communication overheads. Communication between the cores, realized through IOC (Inter OS-Application Communication) in AUTOSAR 4, and also the communication with external memories can lead to significant additional execution times of runnables. These communication overheads can eat up all expected performance from a multi-core CPU. The question is how huge are these overheads and how could they be reduced?

To assess if a certain mapping has large or small overheads several steps are necessary.

First a “cost catalogue” for several applicable communication mechanisms between the cores is determined. The data is measured with a benchmark developed by Gliwa GmbH on the target hardware and the selected operating system; however, still independent from the user application.

Next the user application is modelled directly in SymTA/S or it is imported into SymTA/S, based on an AUTOSAR configuration file, including dependencies and communication types between the runnables. 

SymTA/S combines the data from the cost catalogue and the model of the user application, and calculates dedicated metrics, indicating the amount of communication overheads in the overall system.

Different mappings become comparable and a potentially better mapping with reduced overheads can be found. Furthermore the fulfillment of timing constraints can be proven by the scheduling analysis. 

Infineon recommends SymTA/S for a model based migration of ECU software to multi-core systems. The model-based approach enables changes of the memory mapping of runnables and data very easily as well as answering “what-if” questions.  

“This well-structured approach for mapping software on a multi-core system using SymTA/S can significantly reduce the migration efforts and furthermore the approach scales with the number of cores,” said Jens Harnisch, Tool Line Manager at Infineon Technologies AG.  

Even more effectiveness will be achieved by the use of the metrics to develop an automated mapping generator in future work. 

About Symtavision

In the market segment of complex, safety and mission-critical embedded real-time systems Symtavision provides advanced solutions for timing analysis, verification and optimization, with more than 10 years of research and project experience in this field. Symtavision helps ECU software designers, network and system engineers, architects and integrators to understand, verify and optimize system timing and performance – from early-stage estimation to final verification.  Symtavision’s scheduling analysis tool suite SymTA/S is used for timing budgeting, scheduling verification and optimization for ECUsbus/networks and completeintegrated systems. In automotive electronics, SymTA/S supports standards including OSEK, AUTOSAR-OSCAN and FlexRay. Symtavision also provides all corresponding services, including methodology consulting, execution of projects, customization and training. 

Founded in May 2005 as a spin-off from the Institute of Computer and Communication Network Engineering at the Technical University of Braunschweig, Germany, Symtavision is headquartered in Braunschweig with a subsidiary in Munich and supported by a global distributor network. For more information visit:  www.symtavision.com

Leave a Reply

featured blogs
Apr 23, 2024
The automotive industry's transformation from a primarily mechanical domain to a highly technological one is remarkable. Once considered mere vehicles, cars are now advanced computers on wheels, embodying the shift from roaring engines to the quiet hum of processors due ...
Apr 22, 2024
Learn what gate-all-around (GAA) transistors are, explore the switch from fin field-effect transistors (FinFETs), and see the impact on SoC design & EDA tools.The post What You Need to Know About Gate-All-Around Designs appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured chalk talk

E-Mobility - Charging Stations & Wallboxes AC or DC Charging?
In this episode of Chalk Talk, Amelia Dalton and Andreas Nadler from WĂĽrth Elektronik investigate e-mobility charging stations and wallboxes. We take a closer look at the benefits, components, and functions of AC and DC wallboxes and charging stations. They also examine the role that DC link capacitors play in power conversion and how WĂĽrth Elektronik can help you create your next AC and DC wallbox or charging station design.
Jul 12, 2023
32,584 views