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NVIDIA adopts Synopsys Yield Explorer to reduce time to volume

Design-centric yield management enables product engineers to achieve rapid yield ramp and provide cost-effective yield control in volume production

MOUNTAIN VIEW, Calif.—October 28, 2009— Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that NVIDIA Corp. has adopted Synopsys’ Yield Explorer solution for yield analysis and yield ramp. NVIDIA, which invented the graphics processing unit, selected Yield Explorer because of its ability to coherently combine and cross-correlate large volumes of data from the design, fab and test domains to quickly identify dominant failure mechanisms. This is accomplished through volume diagnostics based on TetraMAX(r) ATPG and other advanced analysis applications.

“At NVIDIA, we face an increasingly challenging production ramp at each successive nanometer node,” said Bruce Cory, manager DFx technology at NVIDIA. “We selected Yield Explorer because this solution has all the traditional yield analysis features combined with unique design-centric, volume diagnostics capabilities. Yield Explorer was able to handle gigabytes of data per day from the test floor and combine it with the design and fab data.”

Ramping new devices to volume production with good yield has evolved into a complex multi-dimensional project at nanometer nodes. On one hand, technical teams must rely on thorough characterisation of new devices to set up effective testing, monitoring, control and root-cause analysis flows. On the other, operational efforts require careful and thorough trimming of these flows to optimise yield management at the lowest cost. The key to solving these divergent needs is to extract the right type and amount of data from the testing of each chip, and to use it in concert with other relevant design and manufacturing data.

Traditional yield management tools were not created to work with such large and diverse volumes of data, severely limiting the quality of control and analysis possible. Yield Explorer demonstrates unparalleled flexibility in accommodating a very broad range of data types, managing very high data rates and enabling effective cross correlations between the diverse data types. Besides opening up these technical possibilities, Yield Explorer also empowers operational teams to make well-informed decisions about production planning and supply chain management by providing customised technical analysis reports to be combined with business process data.

“IC vendors doing high-volume designs at 45 nanometers and below, like NVIDIA, see great value in consolidating all volume ramp activities in a single tool,” said Howard Ko, senior vice president and general manager, Synopsys Silicon Engineering Group. “Yield Explorer uniquely combines large volumes of data with highly flexible modes of yield analysis and control, such as volume diagnostics, favoured by product engineers on ASIC teams worldwide.”

About Synopsys
Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

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