Step right up, ladies and gentlemen. We’ve got CPUs, GPUs, audio codecs, video accelerators, bailing wire, and duct tape. This week’s Fish Fry is about how you can get all of your component ducks in a row with a little help from Performance-IP. Gregg Recupero (CTO – Performance-IP) and I discuss the details of Performance IP’s Memory Request Optimizer, how you can boost the performance of your design while reducing latency in your memory subsystem, and how Performance-IP works with the EDA big dogs (rather than competing against them). Keeping with our memory theme, we also take a closer look at groundbreaking research from MIT that could completely change our understanding of how memories are formed in the brain.
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Links for April 14, 2017
More information about Performance-IP
Neuroscientists identify brain circuit necessary for memory formation
New Episode of Chalk Talk – Keeping Things Quiet: A New Methodology for Dynamic Range Comparator Noise Analysis
Fish Fry Executive Interviews
Darrin Billerbeck, CEO – Lattice Semiconductor
Bill Neifert, CTO – Carbon Design Systems
Sean Dart, CEO – Forte Design Systems
Paul Kocher, President – Cryptography Research Inc.
Dave Kleidermacher, CTO – Green Hills Software
Michiel Ligthart, COO – Verific
Adnan Hamid, CEO – Breker Technologies
Jeff Waters, VP and General Manager – Altera
Simon Davidmann, CEO – Imperas
Ted Miracco, CEO – SmartFlow Compliance Solutions
Cees Links – GreenPeak Technologies
Jessica Gomez – Rogue Valley Microdevices
Shishpal Rawat, Chairman – Accellera Systems Initiative
Kevin Bromber, CEO – myDevices
Daniel Hansson, CEO – Verifyter
Dr. Steven LeBoeuf, President – Valencell
Allan Martinson, COO – Starship Technologies
Zhihong Liu, Chairman and CEO – ProPlus Solutions
Taher Madraswala, CEO and President – Open-Silicon
Kapil Shankar, CEO and Director – AnDAPT
Maximilian Odendahl, CEO – Silexica
Carl Alberty, Vice President – Cirrus Logic
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