fish fry
Subscribe Now

Stand (Tall) and Deliver

Verific Language Parsers and Your Startup Success

Filed under “Don’t Try This at Home” or “Not to be Taken Lightly”, most EDA engineering teams don’t even consider building their own language front end. Most of you will know the name Verific and some probably have used their language parsers a time or two (or twenty), but many of you may not know that Verific also has a robust and comprehensive startup program. In this week’s Fish Fry, Rick Carlson and I chat about how your startup can stand out from the crowd with a little help from Verific. Rick also shares with us some Verific-assisted startup success stories and explains why the giraffe is Verific’s signature giveaway.

 

 

Download this episode (right click and save)

Links for July 22, 2016

More information about Verific Design Automation

More information about the 2016 MEMS Executive Congress

Enter your design in the MEMS & Sensors Technology Showcase

Leave a Reply

featured blogs
Jul 17, 2018
As I mentioned last week in my blog about narrowband IoT , 4G is the standard that is used across the radio interface of most of the connected phones in the world. 4G is the fourth generation of this standard (and LTE is kind of like Rev2 of 4G), mostly dealing with the speed...
Jul 16, 2018
Each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store the eFPGA'€™s configuration bits. Each Speedcore instance contains its own FPGA configu...
Jul 12, 2018
A single failure of a machine due to heat can bring down an entire assembly line to halt. At the printed circuit board level, we designers need to provide the most robust solutions to keep the wheels...