EEJournal

fish fry
Subscribe Now
June 19, 2015

Refocusing Our Embedded Vision

How FPGAs Will Shape the Future of Embedded Vision
by Amelia Dalton

In this week’s episode of Fish Fry, Mario Bergeron (Avnet) and I are scanning the horizon to get a closer look at how FPGAs will shape the future of embedded vision. We explore why embedded vision is a killer app for SoC FPGAs and why there won’t be just one embedded vision to rule them all. Also this week, I check out a new 3D-printed material that changes texture on demand.

 

 

Download this episode (right click and save)

Links for June 19, 2015

More information about the Embedded Vision Summit

Avnet Electronics Marketing Design Expert to Demystify SoC FPGA Development Methodology in Embedded Vision Summit Technical Presentation

New Episode of Chalk Talk: Connecting ZYNQ-7000 All Programmable SoCs with TE Connectivity Interconnect Products

Whitepaper: Locally and Dynamically Controllable Surface Topography Through the Use of Particle-Enhanced Soft Composites

Leave a Reply

featured blogs
Start Your Engines: Best Practices for Converting a Logic Signal to Electrical value with Mixed-Signal Modelling
Nov 30, 2023
Cadence Spectre AMS Designer is a high-performance mixed-signal simulation system. The ability to use multiple engines and drive from a variety of platforms enables you to "rev up" your mixed-signal design verification and take the checkered flag in the race to the ...
More from Cadence...
Meet Synopsys.ai Copilot, Industry's First GenAI Capability for Chip Design
Nov 27, 2023
See how we're harnessing generative AI throughout our suite of EDA tools with Synopsys.AI Copilot, the world's first GenAI capability for chip design.The post Meet Synopsys.ai Copilot, Industry's First GenAI Capability for Chip Design appeared first on Chip Design....
More from Synopsys...
A Haunting World Underwater
Nov 6, 2023
Suffice it to say that everyone and everything in these images was shot in-camera underwater, and that the results truly are haunting....
More from Max's Cool Beans...

featured video

Dramatically Improve PPA and Productivity with Generative AI

Sponsored by Cadence Design Systems

Discover how you can quickly optimize flows for many blocks concurrently and use that knowledge for your next design. The Cadence Cerebrus Intelligent Chip Explorer is a revolutionary, AI-driven, automated approach to chip design flow optimization. Block engineers specify the design goals, and generative AI features within Cadence Cerebrus Explorer will intelligently optimize the design to meet the power, performance, and area (PPA) goals in a completely automated way.

Click here for more information

featured paper

Power and Performance Analysis of FIR Filters and FFTs on Intel Agilex® 7 FPGAs

Sponsored by Intel

Learn about the Future of Intel Programmable Solutions Group at intel.com/leap. The power and performance efficiency of digital signal processing (DSP) workloads play a significant role in the evolution of modern-day technology. Compare benchmarks of finite impulse response (FIR) filters and fast Fourier transform (FFT) designs on Intel Agilex® 7 FPGAs to publicly available results from AMD’s Versal* FPGAs and artificial intelligence engines.

Read more

featured chalk talk

USB Power Delivery: Power for Portable (and Other) Products
Sponsored by Mouser Electronics and CUI Inc.
USB Type C power delivery was created to standardize medium and higher levels of power delivery but it also can support negotiations for multiple output voltage levels and is backward compatible with previous versions of USB. In this episode of Chalk Talk, Amelia Dalton and Bruce Rose from CUI Inc. explore the benefits of USB Type C power delivery, the specific communications protocol of USB Type C power delivery, and examine why USB Type C power supplies and connectors are the way of the future for consumer electronics.
Click here for more information about CUI Inc SDI30C-UT 30W 3-Prong AC-DC Desktop Adapters
Oct 2, 2023
7,165 views