EEJournal

fish fry
Subscribe Now
April 22, 2014

Google’s Smartphone Revolution

Inside Project Ara
by Amelia Dalton

A coup d’état is imminent. A mobile revolution. With “Modular!” banners held high and money where their mouths are, Google is marching through the streets determined to overthrow the status quo in smartphone technology. This week’s Fish Fry is all about Google’s Project Ara – why it’s cool, why you should care about this modular smartphone technology, and how you can get started designing your OWN modules. My guests are Ara Knaian (NK Labs) and David Rutledge (CTO – Lattice Semiconductor) and we are going to talk about what’s inside the Google Ara phone, the important role of FPGAs, and why Ara lent his name to this super cool new project. Also this week, we take a tour of Xilinx’s Vivado IDE and break the biggest news to hit the EE airwaves. 


 

Listen to this episode

Download this episode (right click and save)

Links for April 25, 2014

News – Cadence to Expand Verification Solution with Acquisition of Jasper Design Automation

News – Altera Changes the Game for Floating Point DSP in FPGAs

News – Altera Achieves Industry Milestone: Demonstrates FPGA Technology Based on Intel 14 nm Tri-Gate Process

More information about Project Ara

EE Journal’s NEW Video Blog – On The Scene: Project Ara

Video featuring Ara Knaian – (Tiny) Reconfigurable Robots at MIT

New Episode of Chalk Talk: Vivado Design Suite – Integrated Design Environment

Leave a Reply

featured blogs
Bluetoooth LE Audio, Hearing Aids, and Mindtree
Sep 28, 2022
You might think that hearing aids are a bit of a sleepy backwater. Indeed, the only time I can remember coming across them in my job at Cadence was at a CadenceLIVE Europe presentation that I never blogged about, or if I did, it was such a passing reference that Google cannot...
More from Cadence...
It’s Time to Look at Jupiter!
Sep 22, 2022
On Monday 26 September 2022, Earth and Jupiter will be only 365 million miles apart, which is around half of their worst-case separation....
More from Max's Cool Beans...
How to Design Safe, Appealing, Functional Automotive Lighting Systems
Sep 22, 2022
Learn how to design safe and stylish interior and exterior automotive lighting systems with a look at important lighting categories and lighting design tools. The post How to Design Safe, Appealing, Functional Automotive Lighting Systems appeared first on From Silicon To Sof...
More from Synopsys...

featured video

PCIe Gen5 x16 Running on the Achronix VectorPath Accelerator Card

Sponsored by Achronix

In this demo, Achronix engineers show the VectorPath Accelerator Card successfully linking up to a PCIe Gen5 x16 host and write data to and read data from GDDR6 memory. The VectorPath accelerator card featuring the Speedster7t FPGA is one of the first FPGAs that can natively support this interface within its PCIe subsystem. Speedster7t FPGAs offer a revolutionary new architecture that Achronix developed to address the highest performance data acceleration challenges.

Click here for more information about the VectorPath Accelerator Card

featured paper

Algorithm Verification with FPGAs and ASICs

Sponsored by MathWorks

Developing new FPGA and ASIC designs involves implementing new algorithms, which presents challenges for verification for algorithm developers, hardware designers, and verification engineers. This eBook explores different aspects of hardware design verification and how you can use MATLAB and Simulink to reduce development effort and improve the quality of end products.

Click here to read more

featured chalk talk

56 Gbps PAM4 Performance in FPGA Applications

Sponsored by Mouser Electronics and Samtec

If you are working on an FPGA design, the choice of a connector solution can be a crucial element in your system design. Your FPGA connector solution needs to support the highest of speeds, small form factors, and emerging architectures. In this episode of Chalk Talk, Amelia Dalton joins Matthew Burns to chat about you can get 56 Gbps PAM4 performance in your next FPGA application. We take a closer look at Samtec’s AcceleRate® HD High-Density Arrays, the details of Samtec’s Flyover Technology, and why Samtec’s complete portfolio of high-performance interconnects are a perfect fit for 56 Gbps PAM4 FPGA Applications.

Click here for more information about Samtec AcceleRate® Slim Body Direct Attach Cable Assembly