fish fry
Subscribe Now

Three Rings of EE Fun

Black Hats, FPGAs, and GPS Spoofs

Welcome to the Big Top of EE Fun, ladies and gentlemen! We’ve got Black Hat hackers, GPS spoofers, and in the center ring, a serious FPGA heavy hitter. This week I chat with Jeff Waters (Senior VP and General Manager at Altera) about how FPGAs can differentiate your design from the next guy’s ASSP, how FPGAs are making their way into the automotive market, and what make and model Jeff would pick as his dream car.

I also have one more Altera DE0-Nano Development Kit (courtesy of Altera) to give away to one lucky listener. I’ll tell you at the end of my broadcast how you can enter to win!

Fish Fry Links – July 27, 2012

More Information about The 2012 Black Hat Conference

Press Release – White Sands tests show GPS ‘spoofing’ can be countered

Fish Fry Interview with Cryptography Research CEO Paul Kocher

Kevin Morris’ feature article Towards Silicon Convergence – Altera’s CTO Weighs In

More Information about the DE0-Nano Development Board

Leave a Reply

featured blogs
Jun 1, 2023
Cadence was a proud sponsor of the SEMINATEC 2023 conference, held at the University of Campinas in Brazil from March 29-31, 2023. This conference brings together industry representatives, academia, research and development centers, government organizations, and students to d...
Jun 1, 2023
In honor of Pride Month, members of our Synopsys PRIDE employee resource group (ERG) share thoughtful lessons on becoming an LGBTQIA+ ally and more. The post Pride Month 2023: Thoughtful Lessons from the Synopsys PRIDE ERG appeared first on New Horizons for Chip Design....
May 8, 2023
If you are planning on traveling to Turkey in the not-so-distant future, then I have a favor to ask....

featured video

Automatically Generate, Budget and Optimize UPF with Synopsys Verdi UPF Architect

Sponsored by Synopsys

Learn to translate a high-level power intent from CSV to a consumable UPF across a typical ASIC design flow using Verdi UPF Architect. Power Architect can focus on the efficiency of the Power Intent instead of worrying about Syntax & UPF Semantics.

Learn more about Synopsys’ Energy-Efficient SoCs Solutions

featured contest

Join the AI Generated Open-Source Silicon Design Challenge

Sponsored by Efabless

Get your AI-generated design manufactured ($9,750 value)! Enter the E-fabless open-source silicon design challenge. Use generative AI to create Verilog from natural language prompts, then implement your design using the Efabless chipIgnite platform - including an SoC template (Caravel) providing rapid chip-level integration, and an open-source RTL-to-GDS digital design flow (OpenLane). The winner gets their design manufactured by eFabless. Hurry, though - deadline is June 2!

Click here to enter!

featured chalk talk

Automated Benchmark Tuning
Sponsored by Synopsys
Benchmarking is a great way to measure the performance of computing resources, but benchmark tuning can be a very complicated problem to solve. In this episode of Chalk Talk, Nozar Nozarian from Synopsys and Amelia Dalton investigate Synopsys’ Optimizer Studio that combines an evolution search algorithm with a powerful user interface that can help you quickly setup and run benchmarking experiments with much less effort and time than ever before.
Jan 26, 2023
16,814 views