fish fry
Subscribe Now

More Adventures in EDA Land

Atrenta's SoC Realization and Han Solo in Ice

In this week’s Fish Fry, I interview Mike Gianfagna (Vice President of Marketing – Atrenta) about Atrenta’s role in reshaping the EDA industry, how front-end design has changed recently, and how SoC Realization fits into the EDA ecosystem.

Also this week, I look into a fantastic new gift that might just be perfect for that nerdy someone in your life.

I have a brand new nerdy giveaway to give out, but you’ll have to listen to find out how to win.

If you like this new series be sure to drop a comment in the box below.

 

Watch Previous Fish Frys

Fish Fry Links – September 2, 2011

More information about Atrenta

Han Solo Icecube tray

Principles of VLSI RTL Design

 


Fish Fry Executive Interviews

Moshe Gavrielov, CEO – Xilinx

John Bruggeman, Former CMO – Cadence Design Systems

Darrin Billerbeck, CEO – Lattice Semiconductor

Lauro Rizzatti, Vice President of Marketing, EVE

Bill Neifert, CTO – Carbon Design Systems

Sean Dart, CEO – Forte Design Systems

Kapil Shankar, CEO – SiliconBlue

Andy Pease, CEO – QuickLogic

Rajeev Madhavan, CEO – Magma 

Leave a Reply

featured blogs
Nov 21, 2019
Many of these sayings were already known to me, but there are a lot I've never heard before....
Nov 21, 2019
Edge card connectors — or are they card edge connectors? — are a popular design option. That’s because they make it easy to plug and unplug a mating card that may require more cycling than standard PCBs, and because the socket allows for relatively easy syst...
Nov 20, 2019
During ICCAD earlier in the month, there was the 2nd WOSET, which stands for Workshop on Open-Source EDA Technology. I wasn't there but Anton Klotz, who runs the Cadence Academic Network in... [[ Click on the title to access the full blog on the Cadence Community site. ...
Nov 18, 2019
By Srinivas Velivala – Mentor, A Siemens Business MaxLinear implemented the Calibre RealTime Digital interface for fast, iterative signoff DRC during P&R, and shaved weeks off tapeout schedules while meeting PPA targets. Learn how they did it… At the 2019 TSM...
Nov 15, 2019
[From the last episode: we looked at how intellectual property helps designers reuse circuits.] Last week we saw that, instead of creating a new CPU, most chip designers will buy a CPU design '€“ like a blueprint of the CPU '€“ and then use that in a chip that they'€™re...