feature article
Subscribe Now

Xilinx Turns a Page

Update From CEO Victor Peng

Just over three years ago, Victor Peng took the helm as CEO at Xilinx upon the retirement of Moshe Gavrielov. The management transition marked the beginning of a new era at the company, as Peng began to transform the world’s largest programmable logic company into something with broader market reach and increased potential for growth. 

In 2018, a few weeks after taking over, Peng outlined the new strategy for the world. Xilinx was prioritizing “data center first,” in an effort to capture a chunk of the rapid growth expected in data center and cloud acceleration in the wave of the AI revolution. They were also introducing what they claimed was a new category of device, which they dubbed ACAP (adaptive compute acceleration platform). Peng also said Xilinx planned to “Accelerate Growth in Core Markets” (i.e. not abandon their traditional FPGA customers), and “Drive Adaptive Computing” (basically, find applications and markets for the fancy new ACAP devices they were planning.)

Most of the strategy elements in Peng’s 2018 presentation were what boilerplate safe harbor verbiage would refer to as “forward looking statements,” (because, that’s what strategies are all about.) But, as Yogi Berra said “’It’s tough to make predictions, especially about the future.” 

So, now, three years later, how are Peng’s 2018 promises standing up and where is Xilinx headed next?

Tackling the low-hanging fruit first, Xilinx has delivered and is now shipping numerous variants of “ACAP” devices in their “Versal” families. These devices are fabricated on TSMC’S 7nm CMOS technology, and include FPGA fabric, multi-core ARM-based processing systems, dedicated AI processing engines, very high performance I/O, piles of memory, and a network-on-chip (NOC) facilitating deterministic movement of large amounts of data around the chip without causing massive traffic jams in the conventional FPGA routing. 

Our take on ACAP back in 2018 was lukewarm. We felt the devices would be absurdly complex, which would scare away all but the hardest-core development teams. We also felt that, by trying to do everything at once, ACAP would be mediocre at everything. And, we felt that there was nothing about ACAP that gave credence to the claim that this was a new category of device, rather than simply the next generation of FPGAs.

How did the reality of ACAP stack up? Well, Xilinx did several practical things to address the complexity issues. First, they made huge strides in improving their development tool environment, including introducing their VITIS software development platform which enables software developers to target complex heterogeneous computing platforms (such as ACAP) without having to dive into the LUTs and latches of programmable hardware, and master hardware description languages, synthesis, place-and-route, and timing closure. Score a win for Xilinx on this front. Teams seem to be developing and deploying systems with ACAPs just fine, without getting stuck on the complexity, and without having to hire large teams of FPGA wizards to get them out of the gate.

Second, they rolled out Versal not as a single device family, but as a number of families targeted at different application domains. Not all of the variants include all of the “ACAP” features, and the result is more sensible and practical solutions that don’t leave massive amounts of expensive, high-margin silicon sitting idle in designs that don’t require particular features. Score a win for Xilinx on this front as well. ACAP adapts itself to applications all the way back at the product table, allowing teams to select devices more tailored to their needs rather than a one-platform-fits-all approach. 

Third, regarding ACAP being a new category of device, did that stick? Meh. We are skeptical of any “category” that includes only one element. Nobody else has introduced a competing “ACAP”. There are other devices on the market, (from Intel and Achronix, for example) that include most, or all of the same features that ACAP boasts, that are still referred to as “FPGAs”. We’re gonna call “FAIL” for Xilinx on this one. ACAP is a brand, not a category. (These devices are just fancy FPGAs). 

Our analogy for many of these points is the venerable Swiss Army Knife. When they added the bottle opener, nobody cried “Hey, this is no longer a knife!” People seemed quite comfortable when other elements were introduced – the toothpick, the saw, the scissors – all things that cut or poked or cleaved, decidedly knife-like. But then, the spork? Nothing “knifey about that”. Still, the world kept the “Knife” in the name. There was never that one new feature that pushed us over the line into “Swiss Adaptable Multi-Tool Pocket Device” (SAMPD). And, that’s a good thing.

Xilinx said at the time that the NOC was their spork. It was the one thing that pulled ACAP out of the realm of “FPGA” and leveled it up to boss status. Not the DSP/MAC blocks, not block RAM, not SerDes transceivers… all of those things could still be on FPGAs. But, Xilinx had already abandoned the FPGA moniker years ago with Zynq, taking the position that the ARM-based processing subsystem made the devices “SoCs” and not “FPGAs” – another useless semantic argument that their competitors, not surprisingly, refused to go along with. 

Let’s chalk this whole ACAP naming controversy up to semantics that have little meaning to the engineers designing systems, but allow journalists to fill a few paragraphs with drivel. 

Moving on to the “data center first” strategy, our concern back in 2018 was that becoming “data center first” would take Xilinx’s eye off the ball on their core market. De-emphasizing FPGA, the single defining technology for which the company was a decades-long dominant supplier, in favor of a tiny share of a much larger market where their primary competitor was the 800-lb gorilla seemed ill-advised at best. If you’re the world tennis champ, you don’t just wake up one day and say “Hey, I think I’ll go become an olympic gymnast, I got muscles.”

Xilinx, too, was worried about frightening their loyal FPGA customer base. The “Accelerate Growth in Core Markets” portion of the 2018 strategy was a shout out to them: “Hey, we aren’t abandoning FPGAs, in fact, we plan to accelerate growth there. We got your back.” The company appears to have delivered well on that promise over the last three years, expanding their traditional FPGA offering, and continuing to maintain their market share, and a high level of satisfaction among the FPGA customers we’ve talked to. 

But what about “Data Center First”? In that arena, we’d have to say Xilinx has done “just OK” so far. But, when you’re gearing up for an epic battle against a long-dominant giant, doing OK is a pretty good achievement. Intel will invest several times Xilinx’s market cap to defend their data center dominance, and will not just step aside and let a third party cut into their fortress. (Well, OK, Intel did exactly that with NVidia and GPU-based AI acceleration, but bear with us here.)

But, back in 2018, we suspected there was another thing going on with the Xilinx strategy – an underlying subtext. When you have a dominant share in a market such as FPGAs, your prospects for explosive growth are limited. You won’t grow by just expanding your share of the primary market, as you’ve already won that battle. So, your prospects for growth depend on the market itself growing rapidly. 

FPGAs were not poised for explosive growth. 

At the time, there were also strong rumors that Xilinx was positioning themselves for acquisition. The unfortunate American conceptualization of “Fiduciary Duty” basically says that boards of directors and management teams of public corporations are legally bound to serve the interests of shareholders above ALL others – above those of their employees, their customers, the advancement of technology, and even the environment or the well-being of the planet. To put that in the most draconian terms, if you can legally boost the value of your shares by 10% by destroying your own technology, abandoning your customers, firing your employees, and wrecking the environment, you are legally required to do so. 

Xilinx didn’t need to do any of those things, of course. They just needed to convince potential suitors that they had the potential for explosive growth, and were not limited by the single-, to low-double-digit growth potential of FPGAs. Their 2018 strategy addressed that in several ways. “Data Center First” meant the company was aiming for a market that was easily 10x the size of the FPGA sandbox, with its own explosive growth potential. Creating a “new category” of chip that was NOT an FPGA supported the notion of growing beyond the boundaries of programmable logic. It all made sense. Xilinx was taking out a personal ad.

One company that did not swipe left at the thought of Xilinx’s long walks in the data center was AMD. AMD’S rivalry with Intel famously transcends even Xilinx’s decades-long-duel with Altera (now, we remind you, also part of Intel). An AMD Xilinx marriage sets the stage for an even more intense feud, the likes of which, to be perfectly honest, has tech journalists like us just licking our chops. 

Xilinx has accomplished much more than that the last three years, however. They’ve scored impressive wins in the 5G rollout, and have some truly unique products aimed at that market that should have legs for at least a decade. They are establishing a dominant position in the automotive market, and are looking to expand that to a broader set of sockets across virtually all of the ODMs, and they are expanding their support capabilities to become a “solution” supplier in addition to their traditional strength as a “component” supplier. 

We are curious to see the implications of the AMD acquisition. In the case of Intel/Altera (and most other acquisition, of course) there was a period of lost productivity, employee attrition, and general confusion following the merger. That will definitely have at least some impact on Xilinx, but the depth of that impact will depend on how the transition is managed. It could be minor, it could be fatal, we will have to see.

Also, in the case of Intel/Altera, the merger seemed to pull the company away from traditional markets and customers in order to focus on the larger agenda of winning the data center. We hope that is not the case with AMD/Xilinx, as Xilinx has some very important presence in markets outside the data center that would be damaged if the company de-emphasizes them. 

All-in-all, the three years since 2018 have seen a positive transformation in Xilinx, leading to the likely acquisition by AMD. Numerous impressive new technological solutions have been brought to market, with enthusiastic support from the design community. New markets have been conquered, and old ones have seen steady support, and even some impressive growth. It will be interesting to watch.

 

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Achieving Reliable Wireless IoT
Wireless connectivity is one of the most important aspects of any IoT design. In this episode of Chalk Talk, Amelia Dalton and Brandon Oakes from CEL discuss the best practices for achieving reliable wireless connectivity for IoT. They examine the challenges of IoT wireless connectivity, the factors engineers should keep in mind when choosing a wireless solution, and how you can utilize CEL wireless connectivity technologies in your next design.
Nov 28, 2023
20,250 views