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Selecting the FPGA that Meets Your Signal Integrity Requirements

In light of its critical nature, signal integrity needs to be a key criterion during the planning and design phases of high-speed systems. Ignoring signal integrity can lead to poor reliability, degraded performance, field failures and delayed product releases—all of which can trigger lost opportunities and revenues.

Today’s high-end FPGAs support a variety of single-ended and differential I/O standards, with options to control drive-strength, slew-rate and on-chip termination. If not used correctly, this flexibility offered by FPGAs can make it difficult to manage signal integrity. Selecting the right FPGA that … Read More → "Selecting the FPGA that Meets Your Signal Integrity Requirements"

Pedal to the Metals

You’re cruising home from work one day, and your cell phone rings. You answer (hands free of course…). It’s your boss. New plan. He’s saying something about routing, but you can’t quite make it out. Your head is spinning. Why didn’t you pay the extra thousand bucks for that GPS system? Your boss is still talking, and you’re trying to make sense of what he’s saying, but it’s all rushing together, plus you’ve reached that “Can you hear me now” section of your commute. You catch a word … Read More → "Pedal to the Metals"

World’s Best FPGA Article

Portland, OR – May 10, 2005 – FPGA Journal announced today the immediate availability of the world’s best FPGA-related article. Developed with FPGA Journal’s newest editorial technology, it’s up to 53% more interesting than our previous generation pieces. It contains absolutely the most grandiose superlatives with fewer futile forays into lackluster alliteration, providing a fountain of profound metaphoric insight into marketing trends in the programmable logic industry. Readers of this article may be up to 28% more intelligent than those perusing competitive publications such as Electronic Engineering Times. (If you’re bringing the average down, please stop reading … Read More → "World’s Best FPGA Article"

The Programmable Base Station

Today there are 1.6 billion wireless subscribers in the world with the number anticipated to grow to 2.6 billion in the next 5 years. These numbers show that wireless subscriptions have already surpassed the number of internet users (expected to top 1 billion by mid-2005) and will represent a 37% penetration rate of the entire world population by 2010! To support this growth, wireless infrastructure deployments will also have to experience tremendous growth during the next few years.

Even with this growth, the wireless infrastructure industry can still be classified as entering a mature life cycle phase as we are beginning to see … Read More → "The Programmable Base Station"

Mayday Mayhem

If March winds bring April showers, then April showers must somehow give rise to new announcements in programmable logic and structured ASIC. From tools to technology to applications, let’s sail through some of the most interesting announcements this week to pick up on the latest trends. There continue to be significant advances in the design tools, silicon technology, and applications for FPGAs and customizable logic devices. A close look at this week’s news serves to highlight the direction that the industry is currently taking.

As FPGAs continue their migration from glue logic devices to central … Read More → "Mayday Mayhem"

Power

For years it was like a slogan. “FPGAs are nice, but they’re power hogs.” For the customers that kept the lights on, however, buying thousands of FPGAs for backplane-based, rack-mounted equipment with monster power supplies and plenty of cooling, considerations like performance, I/O, and density far outweighed power as a design-in concern. If a new FPGA family offered a 50% performance increase or doubled the LUT count over the previous generation, damn the heatsinks and full-speed ahead. Designers rolled FPGAs in with reckless abandon.

Today, however, forces are conspiring to bring power concerns off of the … Read More → "Power"

Square Root of Two to the Fortieth

The athlete leans for the tape, pouring his last ounce of energy into the final instant. The crowd is on its feet. A flurry of flashguns trigger, trying to capture the historic moment on digital film. There’s a brief pause as all eyes move up to the giant high-resolution display for the results. The numbers flash on the screen “Square Root of Two to the Fortieth!” The sportscaster’s voice breaks as he shouts with excitement. It’s official – a world record. The most progress ever in the history of progress itself!</ … Read More → "Square Root of Two to the Fortieth"

E. Thomas Hart

Tom Hart took physics in school and was a Bombardier-Navigator in the U.S. Navy. He knows that with proper focus you can take advantage of an exponential ratio to deliver many times more energy to a target than even a much larger unfocused source. As Chairman, President, and CEO of QuickLogic, he applies that same principle in leading his company to success. In a programmable logic industry that is blasting its light in all directions, trying to illuminate every square inch of the digital design landscape, Hart’s QuickLogic is a spotlight, concentrating its resources on solving … Read More → "E. Thomas Hart"

A Bevy of Boards

Choosing your FPGA development board used to be simple and straightforward. You selected a device for your project, called up your distributor, and a few days and dollars later you were the proud owner of “the kit,” which included the standard development board, a version of the design software, and maybe a reference design or two. Your new board had an FPGA in the middle, some configuration circuitry and perhaps a couple of peripherals, and a few standard connectors along the edges.

As time passed, your demands increased. With the newer generations of FPGAs, you needed more … Read More → "A Bevy of Boards"

The Real Fear Factor

Dealing with mass quantities of unsavory bugs is commonplace in both reality TV and modern-day chip design. And, the “fear factor” for both is the same, too: failure to do so in the time specified can put an end to a contestant’s 15 minutes of fame or cost a designer his or her job.

In the era of the system on chip (SoC), dealing with tens of millions of gates is a given for hardware design teams, but the time-to-market game is getting more complex and fraught with danger due to the explosion in embedded software. … Read More → "The Real Fear Factor"

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