Man at the head of the line: Table for three please?
Maitre D’: Bien sur. Ees your party all ‘ere?
Man: Yup.
Maitre D’: Alors, we are full now, so I put your name on ze leest. I cannot say whahn your name weell be call; it dehpond on the size of your partee, available tehbell, ‘ow many tehbell are full at each stehshahn, etceterah. I … Read More → "Reservations Required"
Embedded has always been something of a mixed blessing on FPGAs. Certainly FPGAs feature prominently in many embedded systems, but they rarely take the central computing stage. Why? One word: performance.
There are two ways to implement a processor on an FPGA. The most prevalent is to use a soft core like Nios (Altera), MicroBlaze (Xilinx), ARM (Actel, Altera), Coldfire (Altera), or Mico32 (Lattice; open). The alternative is to use one of the built-in PowerPC processors on the high-end Virtex devices from Xilinx.
The soft core approach is often more appealing for FPGA vendors because … Read More → "Trying to Keep Big Things in Little Packages"
To no one’s great surprise, there’s yet another new ARM chip available in the market. This time the perpetrator is Toshiba, and its lyrically named TMPM330FDFG is a new low-cost microcontroller based on the Cortex-M3 processor design.
The new chip marks Toshiba’s first step into the world of ARM Cortex-M3 processors. The company has certainly produced its share of microprocessors and microcontrollers before – probably numbering in the billions by now – but never one based on ARM’s newish low-end architecture. It’s a move designed to … Read More → "Toshiba Grows a Prefrontal Cortex"
High Level Synthesis technology has made it to the mainstream, but design teams often don’t know how to take advantage of these powerful tools to get the best results out of their design.
In this Chalk Talk, Amelia Dalton hosts Stuart Clubb of Mentor Graphics, and they take you through an example of designing a jpeg compression engine using Mentor Graphics Catapult C.
… Read More → "Catapult C Synthesis Designing a JPEG Compression Engine"Officer McReady scratched his head in confusion. “OK, tell me again why you think Bostwick stole the papers?”
“Because, well, first of all I thought he was going to, see?” he started.
“Why did you think that?”
“Well, something was up. I had some of the documents on my desk, and Debra had some on her desk, and then they were gone. And we found them on his desk. That was just weird; why was he gathering these things … Read More → "Spying on the Innards"
Five fabulous years after removing the “press” from “trade-press,” FPGA Journal has pushed out over 5 million e-mails, over 5 hundred original articles, over 5 thousand news stories, and dozens of webcasts through its servers. You, our audience, have told us often what you like and want – useful, interesting, and entertaining articles; a focus on topics important to engineers; objective and insightful analysis; up-to-date industry news; non-boring webcasts; and a sense of humor. Well, four out of five isn’t too bad.
Our parent company – Techfocus Media, Inc. has been good … Read More → "Happy Birthday to Us"
“So where are you off to this week?” a neighbour asked. “Paris and Munich,” I replied. “Oh, very nice,” he said. Well, perhaps.
Actually, apart from the bus from the airport to the hotel, the hotel in Paris could have been a company event anywhere in the world. It was Freescale’s Paris Technical Forum, where they gather together customers and prospective customers (around 600 people in total) from across Europe and present a series of technical papers and tutorials alongside a small scale exhibition (Technology Lab) with booths from … Read More → "European Roundup"
[Editor’s warning: this article contains multiple instances of polysyllabic scientific jargon. Reader discretion is advised.]
Two non-volatile memory technologies have been making some low-level play over the last little while, and it’s pretty easy to confuse the two or think that they’re somehow related. One is a relative old-timer; one is a newcomer. But for many designers, they may both be unfamiliar. In fact they have pretty much nothing to do with each other from the standpoint of how they work. The question that remains, however, is whether they … Read More → "Exotic Non-Volatiles"
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Electronic System Level (ESL) design claims to offer not just a quicker path from concept to hardware, but a cost-effective one when targeting platform FPGAs. And yet some hold out on ESL due to concern over the netlist’s quality of results (QoR)—a path from concept-to-silicon is not of much use if it does not meet performance and area requirements.
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It has long been a dream of big-picture systems engineering visionaries to crack the barrier between hardware and software. Traditionally, the amount of effort required to take software features and accelerate them by turning them into dedicated hardware has been high and not easily done at the last minute when, for example, a coding bottleneck that needs hardware acceleration is uncovered right before release time.
This is, of course, the impetus behind the many flavors of C-to-RTL that have arisen over the years. From the early days of Handel C to the present, much effort has been … Read More → "Going Against the Grain"
