Articles – Page 512

February 10, 2009

Flash memory is cool to keep around because it’s non-volatile, it’s small, it’s convenient, and, dressed up in all manner of stickwear, well, who can deny that it’s just so darn cute. But peel back those outer attractive layers, and you find much complexity lurking within. For, while we like to think of them as just another memory that we can plug into our PCs, in fact they’re nothing like it. A surprising amount of work goes into writing and reading the gotcha picture you took of grandma stashing … Read More → "Maximizing Flash Lifetimes"

Cleaning Up the Garbage

by Bryon Moyer

February 10, 2009

Angie was a project manager, and she managed a lot of projects. These were fast-moving jobs that required a lot of attention to make sure everything went smoothly. While she tried as hard as she could to plan out as many project details as possible, she knew from painful experience that unexpected things happen and that following a static script didn’t work. She had to keep track of things “in real time,” noting action items carefully to make sure everything got done.

Over time, she had become increasingly sophisticated in her ability to … Read More → "Cleaning Up the Garbage"

Serial Soirée

Altera Tempts with Tons of Transceivers

by Kevin Morris

February 10, 2009

The age of mainstream 40nm FPGAs has now arrived.

Last May, Altera announced the first-ever 40nm FPGA family – Stratix IV. Last quarter, that announcement became a practical reality as the company began shipping Stratix IV devices to customers. Last week, in dueling announcements, Altera announced their second wave of Stratix IV devices, while Xilinx rolled out their new Virtex-6 and Spartan-6 families. Across all of these announcements, one thing is clear. The race for supremacy in the 40/45nm process node for FPGAs focuses on the proliferation of high-speed serial I/O. </ … Read More → "Serial Soirée"

The Road Ahead

The ITRS Updates The Forecast

by Bryon Moyer

February 3, 2009

Each year the International Technology Roadmap for Semiconductors (ITRS) does an update. In case you haven’t seen it, it’s a comprehensive review of where the industry thinks the industry is going. It covers everything from materials to geometries to packaging.

2007 was a weighty update. It seemed like the whole technology roadmap got a good scrubbing. If it’s the first update you’ve seen, you might get the impression that things change a lot from year to year and that visibility is limited. Which might not be that big a surprise & … Read More → "The Road Ahead"

Freescale Bets on “Net-Book” Processor Chip

by Jim Turley

February 3, 2009

Just in time for the post-holiday buying season, Freescale has announced its newest embedded microprocessor, the i.MX51. Like other chips in the company’s MX line, the i.MX51 is an ARM-based chip intended for relatively high-end portable systems. Whereas the i.MX31 and ’35 parts are often found inside of automobiles, the ’51 is being touted as the ideal processor for a whole new category of products: the “net-book” computer.

Priced at less than $20 in volume, including its companion power-management and audio-codec chips, the i.MX51 bundle is a bargain. Freescale’ … Read More → "Freescale Bets on “Net-Book” Processor Chip"

Grand Unification Theory

Xilinx Launches 40/45nm Virtex-6/Spartan-6

by Kevin Morris

February 3, 2009

It’s all coming together.

In response to a rapidly broadening market and increasingly niched and specialized competition, the world’s largest FPGA company has narrowed and focused. With the celebration of their 25th anniversary and the introduction of their new Virtex-6 and Spartan-6 lines, the company is demonstrating the principle of doing more with less – ironically solving a broader class of problems with a narrower range of solutions.

Of course, a lot of this consolidation actually takes place under the hood, where most designers may never notice. As the company has demonstrated … Read More → "Grand Unification Theory"

The End of Silicon Valley

by Jim Turley

January 27, 2009

A moment of silence, please, for Silicon Valley. Intel announced last week it would close its chip-manufacturing plant located near the company’s headquarters in Santa Clara – and with it, the very last chip fab anywhere in Silicon Valley.

The technology that gave its name to the Santa Clara valley, once called “the valley of heart’s delight” for no immediately obvious reason, has left for greener pastures. When I started working in electronics, Santa Clara still had fruit orchards in it. Chip plants alternated with cherry trees. Now there’s … Read More → "The End of Silicon Valley"

Buy a Processor; Get an Operating System

by Jim Turley

January 27, 2009

Everybody’s making deals these days. Fast-food joints have “value menus.” Hotels are offering two-for-one deals; ailing Internet retailers will cover the cost of shipping; desperate SUV dealers are probably ready to offer sexual favors in exchange for a test drive.

We’ve got red-hot deals in embedded processors, too. Freescale has hung out the banners, inflated the balloons, hired the clowns, and shouted, “we must be crazy!” Their gimmick: buy a microprocessor – get a free operating system.

Yup, that’s right. If you buy one of … Read More → "Buy a Processor; Get an Operating System"

Breakout

From Hardware to Software - and Back

by Kevin Morris

January 27, 2009

It was crunch time – the end of the semester in EE school – early 1980s. I, in my usual undergraduate fashion, had procrastinated and was now slamming a unit every day on my self-badly-paced logic design course. The course was designed so that we could complete an average of a unit per week and finish within the semester. Each unit had a section of the textbook to study, (such as “Karnaugh Maps”), a quiz to pass, and a lab to complete (like “verifying Karnaugh simplification using TTL logic”). I had waited until there were exactly enough … Read More → "Breakout"

Open, Virtual and a Platform

by Dick Selwood

January 27, 2009

Let’s start with some thundering generalisations. It is taking too long to bring SoCs to the market. A big bottleneck, and a large and growing part of the overall cost of an SoC, is developing the software to run on the embedded processors. It is often not possible to begin software development until the chip architecture has been pinned down, which severely limits the influence that the software team can have over the architecture. The desk-top development environment, in which software is usually developed, behaves differently to the target environment. Hardware prototypes in, for example, FPGAs, if … Read More → "Open, Virtual and a Platform"

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