SUNNYVALE, Calif. – May 11, 2010 – MIPS Technologies, Inc. (NASDAQ: MIPS), a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, announced that its MIPS64® architecture is powering the new OCTEON® II</ … Read More → "Ultra High-Performance MIPS64® Architecture Powers Cavium Networks’ New Multi-Core Processors"

MOUNTAIN VIEW, Calif., May 11 /PRNewswire-FirstCall/ — Actel Corporation (NASDAQ:ACTL) today announced that embedded designers can now take advantage of a broad portfolio of Actel intellectual property (IP) cores available for SmartFusion™ intelligent mixed signal FPGAs. SmartFusion mixed signal FPGAs are the only device that combines an FPGA, ARM® Cortex™-M3 processor and programmable analog on a single chip. In addition to the multiple peripherals hard coded into the device, Actel enables full customization by offering an extensive library of soft peripherals that can be placed in the low power flash FPGA fabric.

Actel’ … Read More → "Actel Continues to Ease Embedded Design With Extensive Library of IP"

MOUNTAIN VIEW, Calif., May 11 /PRNewswire-FirstCall/ — Actel Corporation (NASDAQ:ACTL) today announced that embedded designers can now take advantage of a broad portfolio of Actel intellectual property (IP) cores available for SmartFusion™ intelligent mixed signal FPGAs. SmartFusion mixed signal FPGAs are the only device that combines an FPGA, ARM® Cortex™-M3 processor and programmable analog on a single chip. In addition to the multiple peripherals hard coded into the device, Actel enables full customization by offering an extensive library of soft peripherals that can be placed in the low power flash FPGA fabric.

Actel’ … Read More → "Actel Continues to Ease Embedded Design With Extensive Library of IP"

Kirkland, WA – May 11, 2010 – DRC Computer and Impulse Accelerated Technologies today announced that the Impulse C™-to-FPGA tools have been integrated with the DRC Accelium™ coprocessor card, enabling software engineers to fully access hardware acceleration using familiar C programming methods. This integration provides C-language control of I/O, memory, streams and signals at the hardware level, allowing applications to leverage the high parallelism possible in FPGAs for higher performance.

FPGAs are recognized as powerful accelerators for non-sequential algorithms, and have been successfully deployed by engineering teams … Read More → "Software Developers Get New High Performance Computing C-to-FPGA Tools"

HILLSBORO, OR — MAY 11, 2010 — Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced plans to interoperate between Cavium Networks’ (NASDAQ: CAVM) OCTEON® II CN63XX processors and the LatticeECP3™ FPGA family via a Serial Rapid IO (SRIO) Specification 2.1 link. SRIO is commonly used in 3G/4G wireless base stations and wireline switches and routers where low latency is critical. Cavium’s OCTEON II processor incorporates two to six cnMIPS64® cores, the most advanced third generation hardware acceleration, and SERDES-based I/Os, including SRIO. Lattice’s ECP3 device boasts the lowest power in a mid-range FPGA family, rich memory … Read More → "Lattice Semiconductor Plans SRIO Interoperability With Cavium Networks’ OCTEON II Processors"

SAN JOSE, Calif., May 10, 2010 — Magma® Design Automation (Nasdaq: LAVA), a provider of chip design software, today announced SiliconSmart® ACE Memory Characterization, the latest addition to the industry-standard SiliconSmart IP characterization and modeling product line. By embedding Magma’s ultra-fast FineSim™ Pro simulator and leveraging Magma’s proprietary optimization technology for memory circuits, SiliconSmart ACE Memory Characterization provides faster, more accurate timing, power and noise characterization of memory instances than competitive tools. With SiliconSmart ACE Memory Characterization, integrated circuit (IC) designers can reduce turnaround … Read More → "Magma Announces SiliconSmart ACE Memory Characterization – Embedded FineSim Pro Enables Most Accurate Characterization of Timing, Power and Noise Models"