feature article
Subscribe Now

Magnetic RAM Finds Its Niche

Everspin Stakes Out the Territory for Magnetic Nonvolatile Memories

“Persistence and endurance will make you omnipotent.” — Casey Neistat

Tiffany & Co. isn’t the biggest retailer in the world, but they seem to do okay. Same goes for Hermès, Rolls-Royce, Bertazzoni, or Princess Yachts. They’re all small boutiques that cater to a clientele with, shall we say, unique product requirements. Sure, they’re expensive. But they’re worth it. 

You might even add Everspin to that list, not because they’re startlingly expensive (they’re not) but because they also cater to a select clientele. For engineers and product designers who want nonvolatile memory that’s fast, reliable, and easy to use, and that doesn’t need a battery backup, Everspin’s MRAM might be the favored choice. 

What’s an MRAM? To paraphrase an old saying, if you have to ask, you probably can’t use it. It’s a magnetoresistive random-access memory, so… sort of a cross between DRAM and flash memory. It’s fast like DRAM, but nonvolatile like flash. But, it’s also randomly addressable like DRAM, without the weird read-erase-write cycle timing that flash requires. As the name suggests, it relies on the peculiar magnetic properties of atomic particles, but no physics degree is required to use it. Set aside the physical provenance and just treat it like a flash memory without the flash drawbacks. 

There are lots of different ways to make memories, and the MRAM concept has been around for quite a while. Despite that, MRAM makers are few. Depending on how you count, Everspin is the only company making standalone MRAM chips. Sure, there are foundries that will lay down embedded MRAM as part of your SoC design. But if you want to buy standalone MRAM chips and solder them to your board? Everspin is your go-to source. 

MRAM competes for sockets with the usual suspects: flash memory, battery-backed SRAM, occasionally FRAM, sometimes battery-backed DRAM. Designers are looking for nonvolatile memory that gives them a balance among capacity, price, performance, and convenience. For most of us, that’s flash memory. But flash is slow, it wears out, and it requires fiddly handling. If you want speed, you go with SRAM and deal with the size and cost of the batteries. If you’re a hardcore datacenter manager, you might use battery-backed DRAM, along with much bigger batteries. Or, if you’re adventurous, you might go with FRAM. 

What MRAM offers that the others don’t is the speed of DRAM or SRAM (it depends), but in a nonvolatile flavor. Unlike flash memory, it’s randomly addressable and doesn’t ever need to be erased. No BIOS changes or software layers. 

The downside is that MRAMs are more expensive per bit than other nonvolatile memories, and they’re not very big. While DRAM makers are shipping boatloads of their 32-Gbit DDR4 devices, Everspin’s largest device is a 1-Gbit MRAM. And, they’re kinda pricey compared to DRAM or flash. 

But MRAM’s advantages can outweigh those shortcomings, for the right kind of customer. Everspin makes chips that are pin-compatible drop-in replacements for SRAMs but that don’t require batteries or supercapacitors. That saves a lot of space, eliminates the power switchover logic, and gets rid of the scary chemical bomb that batteries can become. Batteries and big caps don’t shrink over time, either, so the space you dedicate to them today will still be with you tomorrow and the day after that. 

Everspin also likes to point out that flash memories have a finite lifespan, and woe betide the engineer who inadvertently reuses a flash block too many times. Entire OS filesystem drivers are dedicated to wear leveling so flash devices don’t wear out prematurely. MRAMs don’t have that problem. 

MRAMs also store data “forever,” with the caveat that forever really means “for as long as you could possibly use the chip.” In other words, you can write to the MRAM 24/7/365 and it’ll still last longer than the other components in your system. It’s not literally forever, but it’s longer than the half-life of most digital systems. 

Interestingly, Everspin also makes a version of its MRAM with a brief 3-month retention period. This is intended for large datacenter applications where it’s a high-speed backup medium for server racks in case of power failure. Servers use DRAM (and lots of it) but also need to be hardened against power failures, which can mean relying on huge batteries while the memory is laboriously copied to relatively slow flash devices. Everspin’s alternative is to use MRAM for backups, making core dumps a lot quicker. Long-term retention isn’t required. 

MRAM also makes a dandy code store, because it’s often fast enough for the processor to execute-in-place (XIP). Robotics, casino games, industrial PLCs, RAID journals, medical devices, and new IoT devices all appear among Everspin’s customer applications.  

MRAM capacity grows over time, like other memory types, but it’s not quite on the same slope. DRAM and flash sell in huge quantities, which fuels expensive R&D and underwrites massive fabs. Boutique memories technologies like MRAM don’t have those advantages, so they’re more or less permanently behind the curve and losing ground. That doesn’t bother Everspin very much – the company’s revenues have grown steadily since its 2008 inception – but it does help explain why there’s only one MRAM vendor. The company’s market cap of $78 million is less than 1% the size of, say, Cypress Semiconductor. But boutiques aren’t supposed to be large. That would ruin some of the cachet, and the right kinds of customers already know how to find them. 

Leave a Reply

featured blogs
May 14, 2021
Another Friday, another week chock full of CFD, CAE, and CAD news. This week features a topic near and dear to my heart involving death of the rainbow color map for displaying simulation results.... [[ Click on the title to access the full blog on the Cadence Community site....
May 13, 2021
Samtec will attend the PCI-SIG Virtual Developers Conference on Tuesday, May 25th through Wednesday, May 26th, 2021. This is a free event for the 800+ member companies that develop and bring to market new products utilizing PCI Express technology. Attendee Registration is sti...
May 13, 2021
Our new IC design tool, PrimeSim Continuum, enables the next generation of hyper-convergent IC designs. Learn more from eeNews, Electronic Design & EE Times. The post Synopsys Makes Headlines with PrimeSim Continuum, an Innovative Circuit Simulation Solution appeared fi...
May 13, 2021
By Calibre Design Staff Prior to the availability of extreme ultraviolet (EUV) lithography, multi-patterning provided… The post A SAMPle of what you need to know about SAMP technology appeared first on Design with Calibre....

featured video

Insights on StarRC Standalone Netlist Reducer

Sponsored by Synopsys

With the ever-growing size of extracted netlists, parasitic optimization is key to achieve practical simulation run times. Key trade-off for any netlist reducer is accuracy vs netlist size. StarRC Standalone Netlist reducer provides the flexibility to optimize your netlist on a per net basis. The user has total control of trading accuracy of some nets versus netlist optimization - yet another feature from StarRC to provide flexibility to the designer.

Click here for more information

featured paper

Four key design considerations when adding energy storage to solar power grids

Sponsored by Texas Instruments

Bidirectional power conversion, higher voltage batteries, current and voltage sensing, and a sleek storage system design are top considerations when adding energy storage to solar power grids. Read the latest whitepaper from Texas Instruments to unleash the power of storage-ready solar power grids.

Click to download whitepaper

featured chalk talk

Time Sensitive Networking for Industrial Automation

Sponsored by Mouser Electronics and Intel

In control applications with strict deterministic requirements, such as those found in automotive and industrial domains, Time Sensitive Networking offers a way to send time-critical traffic over a standard Ethernet infrastructure. This enables the convergence of all traffic classes and multiple applications in one network. In this episode of Chalk Talk, Amelia Dalton chats with Josh Levine of Intel and Patrick Loschmidt of TTTech about standards, specifications, and capabilities of time-sensitive networking (TSN).

Click here for more information about Intel Cyclone® V FPGAs