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Helping Sandia National Laboratories Reach Nirvana

A few days ago as I pen these words, I was happily ensconced in my comfy command chair in the Pleasure Dome (my office) when I received an auto-generated email saying I’d been tagged in a post on LinkedIn. I immediately bounced over to take a look (ever hopeful to discover that a long-lost relative had bequeathed me a fortune) and was transported back in time by what I found there (cue “traveling back in time” music and visual effects).

The poster of the message in question was David Toombs, who is a Business Analyst and Salesforce System Administrator at TATA Consultancy Services. When I last saw David, deep in the mists of time we used to know as the 1990s, I had more hair and we both wore younger men’s clothes.

Let’s start with David’s postings, after which I will share some of my own meandering musings. In his first post, and in a subsequent posting, David told the tale of the Nirvana competition (a.k.a. Nirvana benchmark). This was held by Sandia National Laboratories, which is one of three research and development laboratories of the United States Department of Energy’s National Nuclear Security Administration.

As we will see, this competition, which took place in the summer of 1990, was instrumental in your humble narrator finding himself hanging his hat in Huntsville, Alabama. However, I fear we are getting ahead of ourselves. Here is the story of Nirvana in David’s own words:

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Nirvana: Part 1
In 1990, Sandia National Laboratories in Albuquerque, New Mexico, hosted a vendor competition they called “Nirvana,” which was a wish list of Electronic Design Automation (EDA), Printed Circuit Board (PCB), Hybrid Microcircuit, Mechanical, Documentation, and Project Management with Revision control software. If a vendor could satisfy all the requirements, then Sandia would be in “Nirvana.”

This was a government contract and, as such, demanded certain criteria from Sandia and from participating vendors. Sandia already had a vendor successfully installed for many years. Sandia was required to host a minimum of three vendors, so they invited two other vendors. Early in the benchmark, one of these vendors filed for bankruptcy. Nirvana could not proceed without a third viable vendor, so Sandia contacted Intergraph to participate in the place of the bankrupt vendor.

We were not originally supposed to be there. We began weeks behind one vendor and years behind the installed vendor. This was truly a David vs. Goliath underdog moment. While we were expected to lose, no one told us we could not win. The EDA requirements spanned design capture through simulation, to output formats to PCB, Hybrid, Mechanical, and Project Management.

I was one of the Sr. Applications Engineers with Chuck Paglicco as Team Lead, along with Vince Mazur, David Thompson, and Clive (Max) Maxfield.

At that time, Intergraph was well known in the industry, but mainly for Mapping and Mechanical applications. The Electronic Product Group was relatively new. We had to win this contract or start laying people off unless and until we could grow sales. This design win meant everything to our company.

This one contract represented five years of revenue for Intergraph’s Electronics organization. The competition did not give partial credit. Each group had to perform flawlessly, and it was winner take all: “do or die.”

The requirement was to complete multiple projects simultaneously, and all technologies had to communicate with one another seamlessly both from a functional standpoint as well as project management.

We were bound by time and multiple specifications from Sandia that dictated what had to be accomplished. We assembled a complete team at our headquarters in Huntsville, Alabama, to scope out the enormous challenges ahead, assess what resources would be required in the way of people, workstations, network capabilities (the state of the art at that time was 9600 baud modems), engineering, and support from our Sales and Exec team.

We had a total of 36 Applications Engineers (AEs) from around the world. We spent nine weeks in Huntsville, Alabama, and two weeks in Albuquerque working on our respective pieces of this benchmark.

We wrote out and posted our deliverables and schedules as well as those of our colleagues, so everyone was synchronized to the goal at hand. I implemented Gantt Charts to map out milestones, dependencies, critical paths, etc. I drew upon our individual and collective wisdom, experience, and teamwork in order to deliver the desired results.

Nirvana: Part 2
There were five main critical projects to complete: (1) Library update, (2) Design Capture, (3) Simulation, (4) Output formats to PCB, Hybrid, Mechanical, and (5) Demonstrate project management and revision control throughout this phase of the benchmark.

We divided each of these tasks among ourselves along with deadlines for completion.

Words cannot describe the pressure we were under. We went without sleep, not seeing our families, working through illness, and many other hardships. We started behind the eight ball, and we knew we had to work smart and work hard to make up the difference. The future of the electronics product group rested on our shoulders.

The steps we took involved planning up front to identify possible bottlenecks in the flow. We all committed to meet our respective deadlines no matter what it took. If we saw there was a problem that would negatively impact the schedule, we immediately flagged it to the appropriate group/persons. We were lucky to get any sleep, and most of the time we got by on only four hours of sleep a day. Of great importance, we took the time to elicit expectations from key stakeholders. We would then recite what we heard, elaborate, hand draw pictures to verify expected outcomes, all to make sure we could meet or exceed expectations. We never said “No, we cannot do that.”

The actual benchmark took place in Albuquerque over a two-week period. Each group had to demonstrate everything from start to finish to the Sandia evaluation team. We had to perform much like a symphony orchestra.

Intergraph won the Sandia “Nirvana” contract for $30M over 5 years. At the time, this was the largest EDA contract awarded in history. Our EDA Product Group was validated to the world. This order put Intergraph on the map.

There are so many people within Intergraph that helped to win the Nirvana project. This is just a partial list. Feel free to add your name : Jeff Edson (SVP), Bob Terwilliger (VP Sales), Scott Hooper and Gary Wooley (Account Managers), and Noopur Davis (Chief Software Architect).

Epilogue: Intergraph went on to win several more government contracts including NAVSEA, NAVAIR, and NACFAC. Through a series of mergers and acquisitions, Intergraph merged with Mentor Graphics, which has recently become a part of Siemens EDA.

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As I say, David’s postings really took me back in time. These days, we’ve all grown accustomed to incredibly powerful EDA tools accompanied by sophisticated and intuitive high-resolution graphical user interfaces (GUIs) presented in glorious color, but things were not always this way.

It’s worth remembering that the original “big three” companies in EDA—Daisy Systems, Mentor Graphics, and Valid Logic Systems—were all founded in 1981, which was just nine years before the Nirvana benchmark. Daisy, Mentor, and Valid (collectively known as DMV) were followed by Synopsys in 1986 and Cadence Design Systems in 1988. Also in 1988, Daisy merged with another EDA company called Cadnetix, resulting in what became popularly known as Dazix. I’m not sure when Intergraph’s Electronics Product Group was launched, but I’m guessing it was only a couple of years before the Nirvana benchmark.

As I’ve mentioned in previous columns, I graduated from Sheffield Hallam University in 1980. My first job was as a member of a team designing central processing units (CPUs) for mainframe computers at International Computers Limited (ICL) at their West Gorton facility in Manchester, England.

After a little more than a year, two of the managers at ICL left to form their own company, Cirrus Designs, and invited me and some of the other guys to join them. I was employee #6. I arrived the day after the desks and chairs, so the other guys (who had been working while sitting on the floor) said I was the lucky one.

Our main computer was a PDP 11/23 that needed to be booted up via a sequence of codes entered on its front switch panel. This machine’s hard drive, which involved a multi-platter disk mounted in a separate fridge-sized cabinet, could hold only 1MB of data. We all shared the same directory (a.k.a. folder or partition). Filenames followed the classic 8.3 format. Any file whose first letter was ‘M’ belonged to yours truly.

One of the main ways we made money in the early days was to write test programs to verify the functionality of PCBs. These functional test programs ran on 2225 Portable Service Testers manufactured by the American electronic test equipment company GenRad (formally General Radio). When I say “portable,” this was true only if you were in good physical condition.

Other companies would send us a “known good” board (it often wasn’t) accompanied by a set of schematics that claimed to match the revision level of the board (they often didn’t). Each of us worked on different boards from different companies.

The first step was to ponder the schematics, trying to work out just what it was that the board was supposed to do. The next step was to write the test program, which involved specifying a sequence of vectors to be applied to the inputs along with the corresponding values expected at the outputs. Even though the logic on the board was relatively simple by today’s standards, creating a test program was a non-trivial task because of all the registers on the board.

You set up an input vector and clocked it in, then you set up another input vector and clocked that in, and so forth. After some number of clocks, values derived from the first set of inputs would start to appear on the outputs. Each test program could consist of thousands, sometimes tens of thousands, of hand-crafted test vectors. One trick to reduce the vector count (and thus the program run time) was to attempt to use the same group of vectors to tease out multiple faults.

I could waffle on about this for hours. Suffice it to say that this was an amazing learning experience. I discovered more about logic design from looking at the way other designers had created these boards and working out how to test them than I ever learned at university.

Cirrus Designs was based in Manchester. We were a sister organization to another company called Cirrus Computers, which was based in Fareham—a market town located between the cities of Portsmouth and Southampton in southeast Hampshire, England. Cirrus Computers was home to a group of graduates from Brunel University. They created one of the first digital logic simulators, which was called HiLo, and which evolved into System HiLo.

As an aside, GenRad eventually acquired both Cirrus Designs and Cirrus Computers, but they left us running under our original company names. As another aside, one of the guys at Cirrus Computers, Phil Moorby, went on to define the Verilog language and create the first Verilog simulator, but that’s a story for another day.

When you have something implemented in hardware, like a logic gate or a digital integrated circuit, things can happen at the same time (like multiple inputs changing state simultaneously). One of the differences between software programming languages like C/C++ and hardware description languages (HDLs) like Verilog and VHDL is that the former typically describe things that happen sequentially (one after the other) while the latter can be used to represent things that can happen concurrently (at the same time).

The reason I’m waffling on about this here is that, after a couple of years at Cirrus Designs, I started writing simulation models for the System HiLo simulator. Software developers tend to have a hard time wrapping their brains round HDLs, but I was a hardware logic designer by trade, and my brain had been honed developing the aforementioned functional test programs for PCBs, so I took to writing simulation models in GHDL (GenRad HDL) like a duck takes to water.

By the late 1980s, I’d transferred to Cirrus Computers, and I’d created simulation models of everything from ASIC cell libraries to microprocessors. In the case of the latter, rather than specifying a test program vector-by-painful-vector, I came up with the idea of creating a higher-level circuit that included my microprocessor model along with a ROM model and the model of an output port, all hanging off the same data, address, and control buses. Next, I wrote a program in assembly language, assembled it into machine code, and then loaded that machine code into my ROM model. Finally, I set the simulation running. All I had to do in my test program was pulse the reset input and then let the program run in the virtual world, only verifying that, after using all the possible instructions in various combinations to manipulate an original piece of data, the final value was as expected. This may seem like an obvious idea now, but everything was new and undefined back in the day.

At that time—the tail-end of the 1980s—the vast majority of EDA applications were controlled and executed using a command line interface (CLI). We created our models as textual netlists or using an early form of register transfer level (RTL). We created our test vectors as text files of times and data values. We ran the simulation. Then we spent hours poring over the results, which were also presented in the form of ASCII text files. All of this was performed on relatively small, relatively low resolution, black-and-white computer screens.

And then there was Intergraph, which developed and marketed its own flavor of UNIX workstations, each of which was accompanied by a humongous (for the time) 27-inch, 4:3 ratio, color monitor. As David noted above, Intergraph was well known for mechanical and mapping applications. In addition to their own in-house developed applications, they would also take applications from third party companies, which were typically executed at the command line, and “wrap” them in a graphical user interface.

Intergraph’s recently formed Electronics Product Group did the same thing. In addition to its own internally developed tools, they took EDA tools from third party vendors—like System HiLo from Cirrus Computers—and wrapped them in a GUI. The Sandia benchmark was the first time I’d seen a schematic circuit in color on a computer screen. It was also the first time I’d cast my orbs on graphical waveform representations of the ASCII text files that were fed into and generated by System HiLo. I remember feeling like I’d been transported into a Jetson-esque future.

When Intergraph was invited to take part in the Nirvana competition, one of the first things they did was ask the vendors of any third-party EDA tools to send a representative to be on hand to answer any questions. Cirrus Computers decided to volunteer me (I don’t know if this was because they considered me to be the crème de la crème, or because they thought I’d be the least missed).

When I arrived in Albuquerque, I was picked up at the airport and taken to the hotel where the folks from Intergraph were staying. We had two entire floors in the hotel to ourselves. On one floor were the rooms where we stored our clothes, showered, and (occasionally) grabbed a few hours of sleep. On the other floor, all of the furniture (beds, tables, etc.) had been removed and replaced by office desks and chairs and workstations. (I seem to recall that we had security guards posted at the elevators and stairwell doors to our floors, but maybe this is naught but the product of my fevered, sleep-deprived imagination.)

As soon as I arrived, I was introduced to the team, who had only just received the nitty-gritty details of the actual benchmark. Part of this involved creating the simulation models for an ASIC cell library, using these cell models to build a model of a chip, using that chip model as part of a PCB design, and so forth. I asked the team lead, Chuck Paglicco, if anyone on the team had experience creating an ASIC cell library. When he replied in the negative, I told him that I had, and that if he could give me access to a workstation and a VI editor, he could leave that part to me.

Working with the team at Albuquerque quickly led me to believe that Intergraph was jam-packed with the best engineers in the world. In reality, the company, which was about 10,000 strong at that time (~5,000 at the headquarters in Huntsville, Alabama, while the other ~5,000 were scattered in different locations around the world), had a typical spread of capabilities.

What I didn’t realize at that time was that, for the purposes of this benchmark, the Electronics Product Group had gathered its brightest and best from around the world, flown them into Huntsville, and stuck them in an otherwise empty building loaded with workstations. For a couple of months, knowing only the barest outlines of the competition (details were released to all the participants at the start of the benchmark), the team drilled themselves night and day as though they were preparing for a special forces mission.

The upshot was that, in the summer of 1990, against all the odds, we won the Nirvana benchmark. I was invited to join the Electronics Product Group in Huntsville, Alabama. Intergraph Electronics subsequently acquired Dazix at the tail end of 1990, at which time the Product Group transitioned into being a fully-fledged Electronics Division, enjoying years of additional successes.

Eventually, things moved on, as they do. I transferred over into Intergraph’s Computer division circa 1995, and I left Intergraph in 2000 to form my own company with a couple of friends. Intergraph Electronics was spun off into a separate company called Veribest, which was subsequently acquired by Mentor Graphics. Mentor was itself acquired by Siemens in 2017, where it’s now known as Siemens EDA.

One thing that David said in his original post is still bouncing around my noggin: “While we were expected to lose, no one told us we could not win.” It may be that others expected us to lose, but I recall a tremendous esprit de corps and us all having a gung-ho gut feeling that we were destined to win. Suffice it to say that this turned out to be two weeks of the hardest and most intense work I’ve ever done—we counted ourselves lucky to get more than a few hours of sleep a night—and it was also two weeks of the most fun I ever had. I feel privileged to have been part of that group and fortunate to have had the Nirvana experience—a lot of people go through their entire working lives without being lucky enough to encounter anything like this.

As always, I welcome any comments, especially from anyone who worked at ICL, Cirrus Designs, Cirrus Computers, or Intergraph, and doubly so if you were involved in the Nirvana benchmark.

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