EEJournal

  • Articles
  • News
  • Fish Fry
  • Chalk Talks
  • Blogs
  • Categories
    • Category List
  • Media Kit
Skip to content
feature article
Subscribe Now
June 3, 2019

Follow EE Journal’s Live Coverage of the Design Automation Conference

by Larra Morris

The 2019 Design Automation Conference (DAC) is in Las Vegas and our EE Journal team is on the scene to learn about recent developments and trends, and new products and technologies in the design and automation of electronic systems.

We’ll be on the exhibition floor and interviewing the experts at this year’s DAC and live tweeting the whole thing! You can follow along right here on this very page or on our twitter feed: @EEJournalTFM

 

EE Journal’s Coverage of DAC 2019

  • Facebook
  • Twitter
  • Google+
  • YouTube
  • LinkedIn
  • RSS Feed

Related

Tweet submit to reddit

Leave a Reply Cancel reply

You must be logged in to post a comment.

  • Facebook
  • Twitter
  • Google+
  • YouTube
  • LinkedIn
  • RSS Feed
featured blogs
Awesome 12 x 12 Ping Pong Ball Array
Jul 6, 2020
If you were in the possession of one of these bodacious beauties, what sorts of games and effects would you create using the little scamp?...
More from Max\'s Cool Beans...
What the Heck Is Convolution?
Jul 3, 2020
[From the last episode: We looked at CNNs for vision as well as other neural networks for other applications.] We'€™re going to take a quick detour into math today. For those of you that have done advanced math, this may be a review, or it might even seem to be talking down...
More from Inside the IoT...
Here are the June 2020 Website Updates to Samtec.com
Jul 2, 2020
In June, we continued to upgrade several key pieces of content across the website, including more interactive product explorers on several pages and a homepage refresh. We also made a significant update to our product pages which allows logged-in users to see customer-specifi...
More from Samtec, Inc....

Featured Video

Product Update: Advances in DesignWare Die-to-Die PHY IP

Sponsored by Synopsys

Hear the latest about Synopsys' DesignWare Die-to-Die PHY IP for SerDes-based 112G USR/XSR and parallel-based HBI interfaces. The IP, available in advanced FinFET processes, addresses the power, bandwidth, and latency requirements of high-performance computing SoCs targeting hyperscale data center, AI, and networking applications.

Click here for more information about DesignWare Die-to-Die PHY IP Solutions

Featured Paper

Cryptography: How It Helps in Our Digital World

Sponsored by Maxim Integrated

Gain a basic understanding of how cryptography works and how cryptography can help you protect your designs from security threats.

Click here to download the whitepaper

Featured Chalk Talk

Prototyping Billion-Gate Designs with Protium X1 Enterprise Prototyping System

Sponsored by Cadence Design Systems

FPGA-based Prototyping certainly isn’t new. And our needs for early firmware and software development, memory modeling and advanced data capture haven’t gotten any better, if anything - they have gotten worse. Hi, I’m Amelia Dalton - host of Chalk Talk. Today my Juergen Jaeger from Cadence Design Systems and I are talking about the next generation of FPGA-based prototyping and how the first Scalable, Data Center-Optimized Enterprise Prototyping System can get your system design up and running faster than ever before.

Click here for more information about Protium X1 Enterprise Prototyping Platform

All material on this site copyright © 2003 - 2020 techfocus media, inc. All rights reserved.
Privacy Policy Media Kit Contact Us Log In
Subscribe to EE Journal Daily