feature article
Subscribe Now

ARMv9: Fashionably Late

Latest Update to ARM Architecture Aids Security, AI, Performance

Silicon Valley is like Milan. One is the US center of high tech, the other is the fashion capital of Italy. The Valley has its product rollouts and Milan has its runway shows. Both are glamorous, slick, professionally produced events designed to generate excitement but tell you almost nothing about the actual product. They’re teases; entertainment for the press corps documenting the industry’s every move. 

So it was that last week nearly a hundred of my colleagues and I assembled – virtually, of course – to witness the carefully choreographed runway reveal of the latest alta moda di microprocessore. Anyone hoping to catch a glimpse of something revealing will have been disappointed. 

For those arriving fashionably late, the current revision of ARM’s ubiquitous microprocessor architecture is simply called version 8, or ARMv8. It follows, logically enough, on the seven major revisions before it, starting back in 1985. Roughly speaking, that means ARM updates its architectural specification about every 3–4 years. Except that ARMv8 was introduced in 2011. That’s a whole decade ago – a lifetime in microprocessor fashion. 

Well, wait no more! The newest version of ARM will be called… wait for it… version 9! The specification is done and dusted, but actual chips based on ARMv9 won’t be available until late this year, at best. End-user products are likely more than a year behind that, so it’s probably not worth postponing your next smartphone purchase waiting for ARMv9 silicon. 

ARM’s processor-reveal party was long on glitz but short on details, without so much as a block diagram. The three takeaways are that ARMv9 will have (a) better performance than ARMv8, (b) better security than ARMv8, and (c) better AI/ML/DSP capability than ARMv8. So, up and to the right, then. Apart from that, it’s all conjecture. The rest is left to your imagination. 

The performance improvements come through unspecified changes to the microarchitecture, combined with new instructions and data types. ARM’s current SVE (scalable vector extensions) will be, well, extended to create SVE2. VP of Technology Peter Greenhalgh says ARM expects ARMv9-based chips to deliver “more than 30% performance [improvement] in the next two mobile [phone] and infrastructure generations on industry standard benchmarks like SPECint.” 

A 30% uptick in performance would be a big deal, but Greenhalgh didn’t exactly say that ARMv9 would be that much faster. The “next two generations” presumably includes better fabrication on higher-performance process nodes, so there’s no telling how much of that speedup is due to ARM’s processor and how much to TSMC’s silicon. He did suggest that memory latency, bandwidth, cache size, and frequency will all play a part. More gauzy teasing. 

The security improvements will come though “realms,” ARM’s term for hardware-enforced sandboxes or containers. Realms exist independent of operating systems or hypervisors, and a single processor can have multiple realms, thus allowing it to run multiple independent operating systems. End-user apps can run in their own realm, separating them from other apps. No word on how realms are implemented, though it seems likely it’s an extension to the existing TrustZone technology. 

ARMv9 will also implement memory tagging, a technique it developed in collaboration with a team at Google led by David Kleidermacher, formerly the CTO at Green Hills Software. Tagging is one way to help prevent buffer overflows, a persistent problem with most programming languages and a constant source of software vulnerabilities and crashes. 

Finally, ARMv9 will include more DSP-like instructions and data types, including scatter/gather load/store, longer vectors (compared to SVE), more matrix math functions, and more. 

The new updates will appear first in Cortex-A chips for mobile devices, according to CEO Simon Segars, followed by Neoverse datacenter chips. Eventually, ARMv9 enhancements will filter down into the Cortex-R and Cortex-M families, “but we’re not announcing a schedule for R and M profiles.” 

ARMv9 will be a 64-bit implementation, though it will still tolerate 32-bit application binaries. Operating systems and other low-level software must be entirely 64-bit code, however, so some OSen may have to be rewritten or recompiled. Supporting the new security realms will force a rewrite anyway, so converting to 64-bit code seems easy at that point. TrustZone experience will likely prove helpful. 

The company’s new tagline is “Sparking the World’s Potential,” and CEO Segars described ARM as having “the world’s largest technology ecosystem,” which might well be true. He and many of his lieutenants repeated the claim that “soon, every piece of digital data will flow through an ARM-based device somewhere.” I’m sure they didn’t mean it to sound creepy. 

Releasing a new microprocessor design used to be an engineering exercise, nothing more. A few beers in the lab and right back to work. Now it’s a global media event with videos, voiceovers, and virtual panel discussions. The engineers were in evidence, but not the engineering. Maybe in a year or so we’ll be able to evaluate what they’ve done.

Leave a Reply

featured blogs
Aug 3, 2021
I just discovered that Norland Nannies -- who can command a salary of $170,000 on a bad day -- are trained in self-defense and defensive driving....
Aug 3, 2021
Picking up from where we left off in the previous post , let's look at some more new and interesting changes made in Hotfix 019. As you might already know, Allegro ® System Capture is available... [[ Click on the title to access the full blog on the Cadence Community si...
Jul 30, 2021
You can't attack what you can't see, and cloaking technology for devices on Ethernet LANs is merely one of many protection layers implemented in Q-Net Security's Q-Box to protect networked devices and transaction between these devices from cyberattacks. Other security technol...
Jul 29, 2021
Learn why SoC emulation is the next frontier for power system optimization, helping chip designers shift power verification left in the SoC design flow. The post Why Wait Days for Results? The Next Frontier for Power Verification appeared first on From Silicon To Software....

featured video

Accelerate Intelligent SLAM with DesignWare ARC EV Processor IP

Sponsored by Synopsys

Simultaneous localization and mapping (SLAM) algorithms build a map and determine location in the map at the same time. But how can you speed up the results? This demo shows how ARC EV processor IP with CNN engine accelerates KudanSLAM algorithms.

Click here for more information about DesignWare ARC EV Processors for Embedded Vision

featured paper

How AoP technology expands radar sensor placement for automotive applications

Sponsored by Texas Instruments

Car manufacturers are moving toward making several non-ADAS features autonomous, such as automated car doors and trunk opening. These features require a high-resolution sensor that can detect different types of objects and avoid collisions.

Click to read more

featured chalk talk

Vibration Sensing with LoRaWAN

Sponsored by Mouser Electronics and Advantech

Vibration sensing is an integral part of today’s connected industrial designs but Bluetooth, WiFi, and Zigbee may not be the best solution for this kind of sensing in an industrial setting. In this episode of Chalk Talk, Amelia Dalton chats with Andrew Lund about LoRaWAN for vibration sensing. They investigate why LoRaWAN is perfect for industrial vibration sensing, the role that standards play in these kinds of systems, and why 3 axis detection and real-time monitoring can make all the difference in your next industrial design.

Click here for more information about Advantech WISE-2410 LoRaWAN Wireless Sensor