feature article
Subscribe Now

ARMv9: Fashionably Late

Latest Update to ARM Architecture Aids Security, AI, Performance

Silicon Valley is like Milan. One is the US center of high tech, the other is the fashion capital of Italy. The Valley has its product rollouts and Milan has its runway shows. Both are glamorous, slick, professionally produced events designed to generate excitement but tell you almost nothing about the actual product. They’re teases; entertainment for the press corps documenting the industry’s every move. 

So it was that last week nearly a hundred of my colleagues and I assembled – virtually, of course – to witness the carefully choreographed runway reveal of the latest alta moda di microprocessore. Anyone hoping to catch a glimpse of something revealing will have been disappointed. 

For those arriving fashionably late, the current revision of ARM’s ubiquitous microprocessor architecture is simply called version 8, or ARMv8. It follows, logically enough, on the seven major revisions before it, starting back in 1985. Roughly speaking, that means ARM updates its architectural specification about every 3–4 years. Except that ARMv8 was introduced in 2011. That’s a whole decade ago – a lifetime in microprocessor fashion. 

Well, wait no more! The newest version of ARM will be called… wait for it… version 9! The specification is done and dusted, but actual chips based on ARMv9 won’t be available until late this year, at best. End-user products are likely more than a year behind that, so it’s probably not worth postponing your next smartphone purchase waiting for ARMv9 silicon. 

ARM’s processor-reveal party was long on glitz but short on details, without so much as a block diagram. The three takeaways are that ARMv9 will have (a) better performance than ARMv8, (b) better security than ARMv8, and (c) better AI/ML/DSP capability than ARMv8. So, up and to the right, then. Apart from that, it’s all conjecture. The rest is left to your imagination. 

The performance improvements come through unspecified changes to the microarchitecture, combined with new instructions and data types. ARM’s current SVE (scalable vector extensions) will be, well, extended to create SVE2. VP of Technology Peter Greenhalgh says ARM expects ARMv9-based chips to deliver “more than 30% performance [improvement] in the next two mobile [phone] and infrastructure generations on industry standard benchmarks like SPECint.” 

A 30% uptick in performance would be a big deal, but Greenhalgh didn’t exactly say that ARMv9 would be that much faster. The “next two generations” presumably includes better fabrication on higher-performance process nodes, so there’s no telling how much of that speedup is due to ARM’s processor and how much to TSMC’s silicon. He did suggest that memory latency, bandwidth, cache size, and frequency will all play a part. More gauzy teasing. 

The security improvements will come though “realms,” ARM’s term for hardware-enforced sandboxes or containers. Realms exist independent of operating systems or hypervisors, and a single processor can have multiple realms, thus allowing it to run multiple independent operating systems. End-user apps can run in their own realm, separating them from other apps. No word on how realms are implemented, though it seems likely it’s an extension to the existing TrustZone technology. 

ARMv9 will also implement memory tagging, a technique it developed in collaboration with a team at Google led by David Kleidermacher, formerly the CTO at Green Hills Software. Tagging is one way to help prevent buffer overflows, a persistent problem with most programming languages and a constant source of software vulnerabilities and crashes. 

Finally, ARMv9 will include more DSP-like instructions and data types, including scatter/gather load/store, longer vectors (compared to SVE), more matrix math functions, and more. 

The new updates will appear first in Cortex-A chips for mobile devices, according to CEO Simon Segars, followed by Neoverse datacenter chips. Eventually, ARMv9 enhancements will filter down into the Cortex-R and Cortex-M families, “but we’re not announcing a schedule for R and M profiles.” 

ARMv9 will be a 64-bit implementation, though it will still tolerate 32-bit application binaries. Operating systems and other low-level software must be entirely 64-bit code, however, so some OSen may have to be rewritten or recompiled. Supporting the new security realms will force a rewrite anyway, so converting to 64-bit code seems easy at that point. TrustZone experience will likely prove helpful. 

The company’s new tagline is “Sparking the World’s Potential,” and CEO Segars described ARM as having “the world’s largest technology ecosystem,” which might well be true. He and many of his lieutenants repeated the claim that “soon, every piece of digital data will flow through an ARM-based device somewhere.” I’m sure they didn’t mean it to sound creepy. 

Releasing a new microprocessor design used to be an engineering exercise, nothing more. A few beers in the lab and right back to work. Now it’s a global media event with videos, voiceovers, and virtual panel discussions. The engineers were in evidence, but not the engineering. Maybe in a year or so we’ll be able to evaluate what they’ve done.

Leave a Reply

featured blogs
Jul 12, 2024
I'm having olfactory flashbacks to the strangely satisfying scents found in machine shops. I love the smell of hot oil in the morning....

featured video

Larsen & Toubro Builds Data Centers with Effective Cooling Using Cadence Reality DC Design

Sponsored by Cadence Design Systems

Larsen & Toubro built the world’s largest FIFA stadium in Qatar, the world’s tallest statue, and one of the world’s most sophisticated cricket stadiums. Their latest business venture? Designing data centers. Since IT equipment in data centers generates a lot of heat, it’s important to have an efficient and effective cooling system. Learn why, Larsen & Toubro use Cadence Reality DC Design Software for simulation and analysis of the cooling system.

Click here for more information about Cadence Multiphysics System Analysis

featured paper

DNA of a Modern Mid-Range FPGA

Sponsored by Intel

While it is tempting to classify FPGAs simply based on logic capacity, modern FPGAs are alterable systems on chips with a wide variety of features and resources. In this blog we look closer at requirements of the mid-range segment of the FPGA industry.

Click here to read DNA of a Modern Mid-Range FPGA - Intel Community

featured chalk talk

FleClear: TDK’s Transparent Conductive Ag Film
Sponsored by Mouser Electronics and TDK
In this episode of Chalk Talk, Amelia Dalton and Chris Burket from TDK investigate the what, where, and how of TDK’s transparent conductive Ag film called FleClear. They examine the benefits that FleClear brings to the table when it comes to transparency, surface resistance and haze. They also chat about how FleClear compares to other similar solutions on the market today and how you can utilize FleClear in your next design.
Feb 7, 2024
21,648 views