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AMD’s x86 CPU and FPGA tango on Sapphire Technology’s Embedded+ PC motherboard

What could possibly be interesting about a new PC motherboard? New x86 CPU? Yawn. Fancy new cooling fan with blue LEDs? Oh puh-leeze! Integrated FPGA for hardware I/O and computational acceleration with system-level software standardization and API calls? Tell me more. AMD has announced a new PC motherboard architecture for embedded PC applications, which it calls the Embedded+ integrated computing platform. From a hardware perspective, the Embedded+ platform architecture drops an FPGA onto a PC motherboard, connects the FPGA to the x86 CPU via PCIe, and routes the I/O pins from the FPGA to a newly defined expansion connector on the motherboard. In essence, the FPGA becomes a smart – nay, brilliant – I/O expander and hardware compute accelerator for the host x86 CPU.

The idea behind this new architecture echoes a long list of ideas about how FPGAs can enhance CPU performance for applications, including sensor fusion, enhanced industrial networking, vision processing, robotics control, and AI hardware acceleration. The same FPGA can indeed do all of that, and more, and AMD’s Embedded+ platform architecture aims at providing those capabilities to embedded OEMs in standardized form. For the initial release of this architecture, AMD has paired a Ryzen Embedded processor with integrated Radeon graphics and a Versal AI Edge adaptive SoC (which is AMD’s current marketing phrase for an FPGA enhanced with a variety of hardened processors).

The initial processor used in the Embedded+ platform is the Ryzen Embedded R2314 SoC. This processor has a 4-core/8-thread AMD Zen+ x86 processor core, a Radeon GPU capable of supporting three 4K60 or four 1080p60 displays simultaneously, H.264 AVC and H.265 HEVC video encoders and decoders, and sixteen PCIe Gen3 lanes. The chosen adaptive SoC is the Versal AI Edge VE2302 with 150,272 LUTs in the FPGA fabric, two 64-bit Arm Cortex-A72 application processors and two 32-bit Arm Cortex-R5F real-time processors, 32 instances of the AI Engine-ML coprocessor, 464 DSP Engines, and, perhaps most important for the Embedded+ architecture, one hardened PCIe Gen4 x8 port. These two specific devices are merely the processor and FPGA SoCs paired in the first announced Embedded+ motherboard from Sapphire technology. The Embedded+ architecture certainly looks as though it could be extended with an upgraded Ryzen Embedded SoC and a bigger Versal device, perhaps with some software extensions.

As a hardware specification, AMD’s Embedded+ platform hardly breaks new ground. Connecting an FPGA to an x86 processor via PCIe is no stretch in hardware design. It’s been possible to do that for years simply by plugging an FPGA-based PCIe accelerator card into a slot on nearly any PC motherboard. However, placing the FPGA directly on the PC motherboard certainly reduces the size of the CPU/FPGA combination, which can be important in space-constrained embedded designs such as a smart industrial camera by eliminating the PCIe card and by allowing one heat sink and fan to cool both the processor and the FPGA. It also standardizes the available on-board resources, which greatly simplifies software support.

The Embedded+ expansion connector breaks out more than 80 I/O pins from the FPGA and includes fast and slow single-ended and differential I/O pins plus high-speed SerDes ports. These I/O pin specifications appear to have been plucked directly off the Versal adaptive SoC data sheet. The Embedded+ expansion slot specification calls out 24 HDIO single-ended digital I/O pins covering 1.8V to 3.3V logic levels, 56 XPIO high-speed differential digital I/O pins covering speeds to 3.2Gbps at 0.6V to 1.5V logic levels, and four lanes of GTYP differential transceiver pairs for implementing network protocols such as high-speed Ethernet operating at speeds as fast as 32Gbps.

Functionally, the Embedded+ expansion connector reminds me of an FMC or FMC+ expansion port that’s commonly found on many FPGA development boards, but the Embedded+ connector has fewer pins than the FMC and FMC+ connectors. Based on photos of an initial Embedded+ Mini-ITX motherboard from ODM partner Sapphire Technology, the Embedded+ expansion port does not appear to use the same high- and low-density Samtec SEARAY connectors used for the FPGA Mezzanine Card (FMC) or FMC+ expansion ports. It appears to be much smaller with many fewer pins. Sapphire Technology has defined three relatively simple interface boards that slot into the Embedded+ connector: an “Octo” Gigabit Multimedia Serial Link (GMSL) camera I/O card, a dual Ethernet card supporting speeds to 1Gbps, and a dual SFP+ optical card supporting speeds to 10 Gbps per Ethernet connection. No doubt, additional interface cards will follow.

Although the Embedded+ hardware is quite interesting, it’s the standardized software that indeed differentiates the platform. Initially, AMD is reusing previously developed software components in the Embedded+ specification, including the QDMA subsystem for block-level DMA operations over PCIe and the Xilinx Runtime Library (XRT), which allows developers to use programming languages like C/C++, Python, and high-level domain-specific frameworks like TensorFlow and Caffe to manage and call hardware-acceleration kernels. XRT was originally developed for the company’s PCIe-based Alveo accelerator cards, for platforms based on Zynq 7000 SoCs and Zynq UltraScale+ MPSoCs, and for Versal adaptive SoCs.

So far, the software for the Embedded+ platform is no different from the software that AMD already offers for its existing FPGA-based acceleration products. However, AMD plans to put additional – yet to be specified – software support for the Embedded+ architecture into its Vitis AI development tools and Vitis Video application SDK. AMD also plans to develop example designs for the Embedded+ platform including:

  • Sensor fusion with AI inference
  • A machine-vision frame grabber
  • Video AI inference
  • Time-sensitive networking (TSN) and other industrial Ethernet standards

These example applications are all increasingly common for FPGAs and should help attract developers using embedded PCs for their end products to the new Embedded+ platform.

The first announced ODM for AMD’s Embedded+ platform, Sapphire Technology, is better known for its graphics and gaming video cards, which are all based on AMD Radeon GPUs. However, the company also offers a line of industrial and embedded PC motherboards in various form factors, which are all based on AMD Ryzen Embedded processors. So, it’s not surprising that Sapphire Technology would be the lead ODM for AMD’s Embedded+ platform announcement. Sapphire has announced the Edge+ VPR-4616, a 170×170mm Mini-ITX PC motherboard based on AMD’s Embedded+ platform. The Mini-ITX form factor is a favorite for OEMs and other companies building industrial and embedded PCs.


Sapphire Technology has announced the Edge+ VPR-4616, a Mini-ITX PC motherboard based on AMD’s Embedded+ platform that pairs AMD’s Ryzen Embedded R2314 SoC and a Versal AI Edge VE2302 adaptive SoC. Image credit: Sapphire Technology

There’s nothing in AMD’s Embedded+ spec that requires a Mini-ITX form factor. The same architecture could be used to develop a PC motherboard for embedded applications in any standard form factor or even a proprietary form factor.

Using whole computers for industrial control is hardly new. The practice certainly predates PCs. In the late 1970s, I used a Processor Technology Sol-20 to construct a brassboard prototype of a telephone for deaf people. The Sol-20 was an early PC designed by the legendary Lee Felsenstein and was based on the Intel 8080 microprocessor. I used the computer to control the phone’s keyboard and vacuum fluorescent display through an I/O card plugged into the computer’s S-100 backplane bus. In 1973, I developed a DAC card for a DDP-116, which was a transistorized, 16-bit minicomputer made by the Computer Control Company during the late 1960s. An existing reed relay bank in the DDP-116 drove the simple ladder R-2R ladder DAC. Minicomputers were commonly used for industrial control in the 1960s, and this machine had been used by the Brown & Williamson Tobacco Corporation on its cigarette production line and was later donated to the J.B. Speed School of Engineering at the University of Louisville. It was used to control the positioning of a radio telescope antenna that had been built atop the Engineering Department’s building. The DAC card became part of the radio telescope’s control system.

The earliest embedded industrial computer I know of is the Thompson-Ramo-Wooldridge (later called TRW) RW-300, which Texaco used as a closed-loop process control computer in its Port Arthur, Texas oil refinery in 1959. That refinery is currently the largest in North America. The RW-300 was a transistorized, drum-based computer with a real-time operating system and 1024 analog inputs multiplexed to a 10-bit ADC operating at 1.9K samples/sec. If you know of an earlier example, please let me know in the comments below.

I think that AMD’s Embedded+ spec is very good for the industry. It’s the first time I can recall that an x86 processor vendor has backed a PC architecture that fully integrates an FPGA as an I/O expander and hardware computational accelerator. Will Embedded+ take off? I don’t know. Certainly, there are many PC-based applications that need the extra processing oomph of an FPGA. According to data presented by AMD at the launch of the Embedded+ platform spec, sensor data analysis and machine vision applications are the top two use cases for the company’s AI inference chipsets. Integrating the FPGA into the PC motherboard design will lower the overall price of the FPGA augmentation. Will it lower the price enough to be attractive to the embedded PC OEM market? Is Embedded+ the right solution? Only time will tell.

3 thoughts on “AMD’s x86 CPU and FPGA tango on Sapphire Technology’s Embedded+ PC motherboard”

  1. What si supposed to be so groundbreaking in it ?
    What of tha you couldn’t do on clasic mini-ITX MoBo + FPGA on a PCIe card ?

    What AMD needs to do is to open the specs of its chips to the public, so that folk can roll-up their own.

    This si clumsy in that one can’t tailor the PCB to one0s own needs. High speed signals need optimized paths and can’t be routed well through ( expensive) connectors etc.

    Just open the documentatton, please AMD.

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