We don’t hear much about Microsemi in the FPGA world these days. In fact, it would be pretty easy to forget that the company – primarily known for it’s high-reliability mil-aero offerings – is in the programmable logic business at all. With the loud footsteps of Xilinx and Intel/Altera resonating in the hallways, the steadfast persistence of Achronix gnawing at some of their most important markets, and Lattice’s transition to a consumer electronics focus, it’s easy to let the memory of the interesting and capable FPGA families formerly associated with the Actel brand fade into the tapestry.
But Microsemi is still very much in the FPGA/SoC game, and their offerings have some compelling differentiators that make them worthy of consideration – perhaps the best choice – for many application sockets. To review, Microsemi has three families of FPGAs: Igloo2, focused on ultra-low power consumption; SmartFusion2, which were probably the industry’s first actual SoC FPGAs (depending on your view of Altera’s early ill-fated “Excalibur” lines) – including ARM Cortex processors paired with FPGA fabric and SerDes IO; and RTG4, Rad-Tolerant flash-based FPGAs, which took the flag from the company’s venerable anti-fuse mil/aero everything-proof programmable logic devices.
The things that have always set these families apart from the crowd are their non-volatile flash-based design, their high immunity to radiation events such as SEUs, their robust security features, and their comparatively low power consumption. Any of these could be must-have features in many categories of applications. And, for each of these capabilities, Microsemi’s offering distinguishes itself from comparable claims in competitive FPGAs. Additionally, while Microsemi arguably pioneered the idea of hardened processors in FPGAs in the market, their SoC FPGA offerings have, ironically, received little attention compared with those of Xilinx and Altera.
Of course, Microsemi’s SoCs and FPGAs target a completely different market. Their lower density power-sipping Igloo2 FPGAs have an impressive 7mW standby power while sporting a modest 150K maximum LUTs. Even more impressive, they also manage to squeeze in 16 transceiver lanes (PCIe Gen 2, XAUI / XGXS+, Generic ePCS mode at 3.2G), 667Mbps DDR2/3 controllers, hardened countermeasures against differential power analysis (DPA) hardened AES256 encryption and SHA256 hashing, on-demand NVM Data Integrity Check, 5Mbit SRAM, 4Mbit eNVM, and a bunch of DSP blocks. In other words, most of the bells and whistles you’d expect from a high-end FPGA.
The processor-packing SmartFusion2 devices combine pretty much everything in the Igloo2 family above with the addition of a complete ARM Cortex M3 microcontroller subsystem. Both families range from 6K-150K LUTs, 11-240 18×18 multipliers, 209-574 user IO, and 0-16 SerDes lanes, and are available in commercial, industrial, military, and automotive grades.
While these devices have features that appeal to the mil/aero crowd, they certainly offer value that could appeal to much broader audiences. Most likely, Microsemi’s historical focus on the mil/aero high/rel market with their sales and distribution has hampered their programmable devices’ penetration into other markets, where their capabilities are, nonetheless, compelling and attractive. While the major FPGA players have spent incredible resources going toe-to-toe on the largest devices on the most advanced process nodes, they have left a fair-sized hole in their wake that presents opportunities for other vendors like Microsemi to occupy some of the more mass-market segments – products that don’t need the absolute biggest FinFET-enabled, tens-of-gigabit SerDes, FPGAs and SoCs.
Recently, Microsemi announced a round of upgrades to their embedded debug solutions. As with most FPGAs, we can insert embedded logic analyzer functions into the design that facilitate debugging of the programmed silicon. In Microsemi’s case, this capability is supplied via Synopsys Identify, which supports breakpoints allowing specific event-driven sampling of signals, monitoring dynamic signals, and cross-probing back to source HDL.
Microsemi has augmented this with a suite of capabilities they call SmartDebug, which facilitates honing in on problem areas prior to targeting specific blocks with Identify. SmartDebug includes a number of features that can be enabled via the jtag port, which means that they do not require a recompile of the FPGA with special debug code inserted. “ActiveProbe” allows the contents of any flip-flop in the design to be queried in real time, and “LiveProbe” allows the outputs of any FF to be routed to two special pins on the device, where they can be connected to an external logic analyzer. ActiveProbe can do dynamic asynchronous read and write to flip-flops as well as static observation of the signal state.
ActiveProbe and LiveProbe allow you to get a pretty good idea where any issues lie before you insert probes and get down to detailed debugging with Identify. Then, you can drop in probes and route any internal signals to available IOs on the device, triggering an incremental place-and-route to put in the necessary logic. There is also a memory debug capability that does dynamic asynchronous single read/writes of internal SRAM blocks.
You can poll an entire LSRAM or USRAM and write back changes on the fly.
SmartDebug also includes a flash memory utility that is used to capture the eNVM content from the FPGA device. It gives flexible-to-access specific memory pages and shows the page number and address of the read memory. A SerDes debugger gives real-time access to “SERDESIF” block control and status registers and provides testing functions with pseudo-random binary sequences or constant pattern generators and checkers. It allows you to run link tests with a variety of loopback options.
Together, these features should take a lot of the headache out of debugging the fairly large designs that these devices are capable of supporting. Along with the rest of Microsemi’s comprehensive tool suite, they make a convincing case for sizing up Microsemi’s low-profile programmable logic devices for your next design. They just might have what you need.
