feature article
Subscribe Now

YoT – the Year of Things

2016 is Here!

The song has been sung, the corks popped, the celebrations made, and the consequences endured. 2015 has ended, and we have plunged headlong into 2016. Moore’s Law may have ended, but the technology landscape is no less dynamic than it has ever been. We look forward to an exciting year of innovation and celebration, controversy and confusion as the fruits of five decades of exponential progress fall from the trees into our waiting arms. 

When we founded this publication back in 2003 under the “FPGA Journal” masthead, we knew that the world was in the midst of dramatic and discontinuous change driven by technological progress. At the core of that progress was the engine of Moore’s Law, which had the net effect of a rocket-ride increase in computing power versus every other important metric: cost, power consumption, and form factor.

On top of that computing power explosion, of course, has been an impressive but much more muted progress ramp in the software required to put those computers to work. While we don’t have an easy metric like transistor counts to chart our progress in software technology, it is safe to say that advancement in software has been more of a linear rise rather than Moore’s Law’s exponential. Here, then, at the end of Moore’s Law for hardware, we have a comfortable gap between what could be accomplished with today’s hardware and what our current software technology will allow us to actually do. 

Here in 2016, at the end of fifty years of Moore’s Law, we should be seeing a slowing of raw technology advancement in digital hardware. Rather than “Cramming More Components onto Integrated Circuits” we are finding more elegant ways to deliver those components, as well as more interesting and creative things to do with them. We are building platforms that make it almost trivial to design a new electronic product with remarkable computing power. All the engineering team needs to do is add the software to make it do something.

2015 left footprints of that trend toward elegant packaging of digital technology. We saw some of the largest mergers and consolidations in the history of the semiconductor industry. Avago and Emulex, NXP and Quintic, Silicon Laboratories and Bluegiga, NXP and Freescale, Consortium and ISSI, NXP and Athena SCS, Lattice Semiconductor and Silicon Image, Microsemi and Vitesse, Silicon Motion and Shannon Systems, Nova and ReVera, Avago and Broadcom, Microchip and Micrel, Qualcomm and CSR, and Intel and Altera.

Three of these stand out in particular, both because of their enormity and because of the integration trends they portend in the semiconductor market. NXP and Freescale top the list at about $40B, creating a compelling position in what the company calls a “Smarter World.” Avago and Broadcom join forces to the tune of $37B to bolster our devices’ ability to communicate with each other. And Intel and Altera take a $16B leap into the future of the datacenter and the IoT. Common in all of these plans is consolidation of capabilities in silicon and a strategic move toward the IoT future – where some estimate that trillions of devices will soon be chatting with each other across an incomprehensibly large global communications network. 

Of course, IoT is on everyone’s mind. But, is IoT now one of those uselessly overloaded terms that has been applied to so many things that it no longer has any meaning? We don’t think so, although there is a very good chance that for the next few years, almost everything done by electronics engineers will in some way be related to IoT. Working on sensors, sensor fusion, or context? Definitely IoT. Working on low-power microcontroller-based applications that do something interesting with all that data? Totally IoT. How about wireless mobile connectivity? Yup, IoT. Or, starting from the other end, datacenter applications for cloud-based computing? Essential to IoT. Internet backbone and packet switching? Couldn’t do IoT without it. Big Data? IoT. 

Most of the work required to realize the potential of IoT is in software. Hardware (take a quick bow folks) is quite a bit ahead of the game. Sure, we’ve all got plans on the drawing board to make our systems faster, smaller, cheaper, more robust, and more power efficient. But if the hardware improvement were to suddenly stop tomorrow, there would be decades of time left for progress in software development using the hardware we already have.

As we reported when we predicted the Intel/Altera merger back in 2014 (How do you like the way we worked that little boast into the conversation?), FPGAs could well be the next big thing in datacenter processing. FPGAs have the potential to dramatically increase throughput while reducing energy consumption. But the FPGAs and processor technology we need to accomplish those gains are already here. What’s missing? Software. We need to be able to take applications written for conventional processors and seamlessly port them to heterogeneous processing platforms that combine conventional processors with FPGA fabric. But the “compilers” that can accomplish that feat are years away.

We already have sensors that can measure just about anything you can imagine, and ultra-low-power processors that could interpret that data. What’s missing in our ability to make our machines really understand context – to know what’s really going on? What’s preventing our wearable device from automatically understanding whether we are walking, running, riding in a car, or playing badminton? Software. We have cameras with stunning performance connected by ultra-high-bandwidth connections to insanely fast heterogeneous computing engines. What’s needed to make our systems actually “see” and understand what it is they’re seeing? Software.

We are entering an era that will be dominated by software. And, regardless of what type of engineering we’re doing – even hardware engineering – we will actually, in some way, be doing software engineering as well. Sitting at the nexus of that hardware/software fusion is electronic design automation (EDA) of course, and we can look for the EDA industry to capitalize on the slowed pace of Moore’s Law to get a better grip on their own technology. For decades, EDA has been at the mercy of exponential growth in problem size. When you have to double the capacity and performance of your tools every couple of years, there isn’t much time left over to integrate and polish your product. Now, perhaps that time has come.

As 2016 begins, we are excited for what the future holds. The pipeline of potential in technology is almost bursting at the seams, and it is up to our engineering community to walk the final mile, turning all that potential into the amazing applications it should become. Have a great year out there, folks. We’re excited to see what you’ll accomplish.

Leave a Reply

featured blogs
Dec 1, 2023
Why is Design for Testability (DFT) crucial for VLSI (Very Large Scale Integration) design? Keeping testability in mind when developing a chip makes it simpler to find structural flaws in the chip and make necessary design corrections before the product is shipped to users. T...
Nov 27, 2023
See how we're harnessing generative AI throughout our suite of EDA tools with Synopsys.AI Copilot, the world's first GenAI capability for chip design.The post Meet Synopsys.ai Copilot, Industry's First GenAI Capability for Chip Design appeared first on Chip Design....
Nov 6, 2023
Suffice it to say that everyone and everything in these images was shot in-camera underwater, and that the results truly are haunting....

featured video

Dramatically Improve PPA and Productivity with Generative AI

Sponsored by Cadence Design Systems

Discover how you can quickly optimize flows for many blocks concurrently and use that knowledge for your next design. The Cadence Cerebrus Intelligent Chip Explorer is a revolutionary, AI-driven, automated approach to chip design flow optimization. Block engineers specify the design goals, and generative AI features within Cadence Cerebrus Explorer will intelligently optimize the design to meet the power, performance, and area (PPA) goals in a completely automated way.

Click here for more information

featured paper

Power and Performance Analysis of FIR Filters and FFTs on Intel Agilex® 7 FPGAs

Sponsored by Intel

Learn about the Future of Intel Programmable Solutions Group at intel.com/leap. The power and performance efficiency of digital signal processing (DSP) workloads play a significant role in the evolution of modern-day technology. Compare benchmarks of finite impulse response (FIR) filters and fast Fourier transform (FFT) designs on Intel Agilex® 7 FPGAs to publicly available results from AMD’s Versal* FPGAs and artificial intelligence engines.

Read more

featured chalk talk

Advantech Industrial AI Camera: Small but Mighty
Sponsored by Mouser Electronics and Advantech
Artificial intelligence equipped camera systems can be a great addition to a variety of industrial designs. In this episode of Chalk Talk, Amelia Dalton and Ryan Chan from Advantech explore the components included in an industrial AI camera system, the benefits of Advantech’s AI ICAM-500 Industrial camera series and how you can get started using these solutions in your next industrial design. 
Aug 23, 2023
11,978 views