It can be tough being in the lead. For years, one of the brightest spots for Altera Corporation in the FPGA market competition with archrival Xilinx, Inc. has been their Quartus II tool suite. It’s no secret that Xilinx struggled with their old ISE tools, ultimately leading to a complete, ground-up redesign. Altera’s Quartus II continued doing its job, while Xilinx had the “new shiny object” – with all the excitement and problems that go along with re-designed tools.
But, what then do you do if you’re Altera? You’ve been ahead in tools for years, your customers are pretty happy with Quartus II, and they’ve invested a lot learning to use it effectively. Your competitor (and their customers) have bitten the bullet and started from scratch with a new but modern tool suite. You don’t want to disrupt the good thing you’ve got going with Quartus II, but neither do you want to have the perception that you’re the ones with the “old” tools. You’re in a bit of a pickle.
Luckily, Moore’s Law comes along and keeps everybody focused on the real problems. The newest generation of FPGAs can have over 5 million logic cells, four times the previous generation’s high-speed serial IO bandwidth, quad-core 64-bit applications processors, over two Tbps parallel and serial memory bandwidth, and over 10 Tera FLOPS of processing power. Any savvy tool suite would quiver in fear at the Moore-esque magnitude of the design problems about to rain down on its unsuspecting algorithms.
Altera’s answer was to give the “Six-million-dollar Man” treatment to the venerable Quartus II: replacing its underlying engines and algorithms with new ones, making it better than before – stronger, faster… Enter Quartus Prime!
Quartus Prime maintains the look and feel of Quartus II, but it has a whole new infrastructure under the hood – specifically designed to handle the monster designs that will be thrown at the company’s “Generation 10” FPGAs. Altera calls this new engine “Spectra-Q” (which we have written about before). Altera’s goals for Quartus Prime were simple: faster design entry, faster compile and iteration times, and fewer design iterations – all while producing better quality-of-results (QoR). They wanted to accomplish these things while maintaining the same user interface, so that their customers would not have the disruption of learning a new UI, when they were already pretty happy and accomplished with the old one.
Altera’s approach was to start with a hierarchical database, introduce new, advanced algorithms for synthesis, place and route, and design planning – all behind a new unified compiler technology. The company has expanded and updated language support, adding System Verilog and VHDL 2008. They have added a new interactive tool called “BluePrint Platform Designer” for IO planning and design rule checks. BluePrint Platform Designer enforces correct-by-construction pre-placement of IOs, eliminating the iterate-and-fix loop of the previous generation. A new “Hybrid Placer” and new synthesis algorithms then do the heavy lifting to achieve much of the new QoR improvements. Then, an incremental design and optimization flow reduces the number of iterations required while decreasing the iteration time and leading to much faster design convergence.
There is a synergy between the hierarchical database and design flow, IP blocks that have already been tuned, and faster, more-predictable iterations. Once you have major parts of your design nailed down with all the timing issues fixed, the last thing you want is to have the tools throw the whole thing back up in the air again when you make a small change to an unrelated part of the design. And, you don’t really want to wait around while the tool re-does all the work on those parts of the design that didn’t change. An incremental, hierarchical design methodology solves both of those problems at once.
Altera claims that Quartus Prime achieves a full one-speed-grade QoR improvement, comparing the “push-button” flow with the previous-generation Quartus II. The company also says the IO design process time can be reduced by 90% with BluePrint Platform Designer, and it claims a 75% reduction in compile times. These are remarkable numbers for algorithm and database changes in software tools that have already been optimized for decades. Typically, a 1-2% improvement is a big deal.
The company is changing the way the software is packaged with Quartus Prime. Previously, with Quartus II, there were two versions: A free “Web Edition” version, and a full-featured “Subscription Edition.” With Quartus Prime, this has expanded to three versions: A “Lite Edition” (which is comparable to the old “Web Edition”), a “Standard Edition” (which is a direct replacement for the old “Subscription Edition” for people who already use that version), and a new “Pro Edition” that contains additional capabilities that apply only to the company’s newest Stratix 10 and Arria 10 families of FPGAs, such as the new Spectra-Q synthesis.
If the looming acquisition by Intel is affecting Altera, it doesn’t show on the outside. The company appears to be on its usual game, with steady progress on technology and scrappy sparring with its primary competitor. Quartus Prime and Spectra-Q are elegant engineering and marketing answers to Xilinx’s loud and strong Vivado initiative, and there is no sign that Altera has gone into any kind of suspended animation state awaiting assimilation by Intel.
It will be especially interesting to watch the direction of Altera and of the FPGA market over the next couple of years. The 14nm/16nm FinFET semiconductor node is bringing the biggest bounty of Moore’s Law goodness we’ve seen in over a decade. The market is just coming to grips with the remarkable capabilities of SoC FPGAs as a whole new category of device, and both Altera and Xilinx have invested incredible resources in new tool capabilities to keep up with the design demands that will come along with the next generation of devices.
At the same time, FPGAs are going outside the realm of the usual “FPGA expert” community into new markets and new applications. Most of these new applications also involve large software components, so both Altera and Xilinx are forced to bolster their tool offerings for the software as well as the hardware engineering communities.