feature article
Subscribe Now

MIPS: Many Interesting Possibilities for Students

Imagination Gives Universities a Free MIPS Processor to Learn From

Trade schools and universities are two sides of the same educational coin. Broadly speaking, trade schools teach you how to work with your hands, while universities teach you how to hunt for low-wage jobs. No, wait… that’s liberal arts colleges.

Trade schools teach skills. Universities teach politics. No, that’s not it, either. Universities feed your head, medical schools your heart, trade schools your hands, and health… is uh, the 4-H Club.

Whatever the actual institution, most students studying Computer Science or Electrical Engineering rarely get to see inside an actual, working microprocessor. Mechanics studying at trade schools tear down real cars all the time. Med students intern at hospitals and get to see actual squishy stuff. But budding processor designers typically make do with simulation models or toy architectures. Imagination Technologies wants to change that.

Starting later this year, Imagination is offering a free MIPS microprocessor license to educational institutions. The deal includes a specific configuration of the MIPS architecture geared toward FPGA implementations, along with the software tools required to write real code. The idea is that engineering students will get to see how a working microprocessor is designed in the real world, as opposed to a sanitized or hypothetical model used purely for teaching purposes. It’s a warts-and-all approach to CPU architecture.

Not that MIPS has many warts. As one of the canonical RISC processor architectures from the 1990s, MIPS is about as streamlined as they come while still having some practical value. It’s got all the features you’d want to see – execution pipeline, orthogonal register set, useful instruction set, and so on – implemented in a time-tested and practical manner. In short, it’s a real processor, not a teaching toy.

What students will get is one of the many variations of the MIPS 4K family that includes cache and MMU, but not an FPU or any DSP extensions. Thus, it’s a 32-bit integer core with a five-stage pipeline and the code-compressed microMIPS instruction set in addition to the standard 32-bit instruction set. Imagination didn’t create a special version just for the academic program. Instead, the company just cherry-picked from the list of existing configuration options to come up with an implementation that made sense: complex enough to be useful and educational, but not so overburdened with add-ons that it obscured the basic workings of the CPU core. And so that they wouldn’t give away too much IP for free.

So why is Imagination giving away one of its crown jewels? The company is the first to admit that its motives aren’t entirely altruistic. “There is a certain amount of self-interest,” says program director Robert Owen. “We want MIPS-literate graduates coming out of university when they go looking for a job.” At the end of the day, “it’s a business-development program.”

But starting and running an educational program involves a lot more than just throwing RTL at college students and waiving the license fees. To be successful, Owen says, requires four things: academic-focused course materials, suitable software tools, a cheap hardware platform, and appropriate support. It’s that first part – the teaching materials – that are the most difficult for a commercial entity to develop. So Imagination hired University of Nevada at Las Vegas (UNLV) professor Sarah Harris to write the course materials. In fact, it was Harris’s husband and coauthor, David Harris, who configured the MIPS microAptiv core for the university program.

Unencrypted RTL is part of the deal, so students can see exactly how this particular CPU is implemented. “Don’t obfuscate it,” was one of the mantras of the program. As much as Imagination may have wanted to clean up the design, that would have defeated the purpose. Students can already find plenty of neat, tidy RTL models. The point here was to see how real engineers implement real CPU cores. Owen admits that there are some parts of the microAptiv design that may appear a bit, uh, nonstandard to incoming students. But that’s all part of the plan. 

Educational users are free to implement the CPU in any FPGA they like, and the company recommends a couple of low-cost development boards for that purpose. The academic license also permits students (and their instructors) to modify the CPU design if they’re feeling ambitious. The only restriction is that you can’t modify the processor and then patent your changes without first talking to Imagination Technologies; this avoids awkward situations where the company is locked out of its own processor. You also can’t implement the CPU in “real” silicon; FPGA only, please. Anything else would tend to annoy commercial licensees who presumably paid real money for their MIPS microAptiv licenses. Like Microchip.

There are plenty of other free or open-source processor designs out there. Why would students want to learn on MIPS and not on, say, OpenRISC or RISC-V? I mean, c’mon, RISC-V was even invented by a Berkeley professor and CPU designer extraordinaire specifically as a teaching aid.

Because MIPS is a commercial success, unlike those other CPUs. They might make great teaching tools, but they’re not often found in the wild. Detailed knowledge of RISC-V circuitry won’t get you a job; knowing how to create a working MIPS processor just might. On the other hand, learning MIPS is probably easier than reverse-engineering ARM, and certainly less traumatizing than spelunking the Stygian depths of an x86 processor.

A free and only very lightly encumbered MIPS license has got to be a good thing for everyone concerned. Students and faculty get a live processor to train on, sort of like training medical students on real cadavers instead of plastic models. Imagination Technologies gets its star CPU in front of a few hundred impressionable students. And current MIPS licensees get a slightly improved outlook for hiring trained talent. It’s a Multiple Independent Personnel Satisfier. 

Leave a Reply

featured blogs
May 7, 2021
In one of our Knowledge Booster Blogs a few months ago we introduced you to some tips and tricks for the optimal use of Virtuoso ADE Product Suite with our analog IC design videos . W e hope you... [[ Click on the title to access the full blog on the Cadence Community site. ...
May 7, 2021
Enough of the letter “P” already. Message recieved. In any case, modeling and simulating next-gen 224 Gbps signal channels poses many challenges. Design engineers must optimize the entire signal path, not just a specific component. The signal path includes transce...
May 6, 2021
Learn how correct-by-construction coding enables a more productive chip design process, as new code review tools address bugs early in the design process. The post Find Bugs Earlier Via On-the-Fly Code Checking for Productive Chip Design and Verification appeared first on Fr...
May 4, 2021
What a difference a year can make! Oh, we're not referring to that virus that… The post Realize Live + U2U: Side by Side appeared first on Design with Calibre....

featured video

Introduction to EMI

Sponsored by Texas Instruments

Conducted versus radiated EMI. CISPR-25 and CISPR-32 standards. High-frequency or low-frequency emissions. Designing a system to reduce EMI can be overwhelming, but it doesn’t have to be. Watch this video to get an overview of EMI causes, standards, and mitigation techniques.

Click here for more information

featured paper

Keys to quick success using high-speed data converters

Sponsored by Texas Instruments

Hardware designers using modern high-speed data converters face tough challenges. Issues might include connecting with your field-programmable gate array (FPGAs), being confident that your first design pass will work, or determining how to best model the system before building it. In this article, Texas Instruments takes a closer look at each of these challenges.

Click to read more

featured chalk talk

Building Your IoT Toolbox

Sponsored by Mouser Electronics and Digi

December 17, 2020 - IoT design is a complex task, involving numerous disciplines and domains - including embedded design, software, networking, security, manufacturability, and the list goes on and on. Mastering all those moving parts is a daunting challenge for design teams. In this episode of Chalk Talk, Amelia Dalton chats with Andy Reiter of Digi International about development, deployment, manufacturing, and management tools for IoT development that could help get your next design out the door.

Click here for more information about DIGI XBee® Tools