feature article
Subscribe Now

FPGAs in the IoT

Lattice iCE40 Ultra Brings Programmability to Wearables

In the 1960s, an electronic device was “cool” if it had the word “transistor” in it. Even though the general public didn’t understand the benefits a transistor brought to a portable radio, everyone wanted the new “transistor” type. Then, of course, the shock and awe of Moore’s Law took the world on a fifty-year joy ride that completely isolated the electronics-buying public from any hope of understanding or appreciating what went on inside the latest consumer technology wonders.

For that reason, the “FPGA” label probably won’t be applied to mobile and wearable products the same way “transistor” was a few decades back, but the role of the FPGA today is no less transformative and enabling than the transistor was in the 1960s. Using an FPGA in a consumer device – particularly a small, power-sensitive, portable or mobile one – raises the stakes in a way that most definitely deserves a title role.

Lattice understands the importance of FPGAs in the emerging world of tiny, IoT-enabled, battery-powered, cost-sensitive, space-constrained wonder-widgets. They know that adding just the right chunk of programmable hardware to a design can get it out the door faster with more capability and better performance. The company has engineered a dramatic turnaround for itself with thinking just like that – find a rapid-growth, high-value market that can benefit from just-the-right FPGA, and then design just-the-right FPGA for the job.

A few years ago, Lattice acquired FPGA startup SiliconBlue. It is worth noting that SiliconBlue is the only FPGA startup of the past couple of decades whose products survived the treacherous transition from startup mode to full-scale, profitable production. Since joining forces with Lattice, former SiliconBlue “iCE” products have found their way into an incredible number of mobile devices like smartphones, tablets, cameras, and more – accounting for a healthy share of the “over one billion” devices Lattice has sold over the past decade.

Now, the company brings us the “Ultra” version of the already-successful iCE40 line, and it’s positioned squarely at the emerging ultra-portable “wearable” style devices. The previous version of iCE40 has already claimed the title of “world’s smallest FPGA.” Now, like Ant Man, iCE40 Ultra brings a whole lot more useful capability to that tiny form factor. 

The ruling constraints in wearables are power, size, and cost. iCE40 Ultra sips juice as slowly as 25uW, fits in a 1.40 x 1.48mm BGA package, and costs less than fifty cents in volume. It packs more features into that category than any other FPGA in the world. Of course, no other FPGA in the world comes even close to fitting into that category. If you have a hard time believing that something with those specs is actually an FPGA, stay tuned. With the new “Ultra” designation, Lattice has actually crammed a lot of “big FPGA” features into these little guys.

Starting with the top-line constraints, Lattice says Ultra is actually smaller than its predecessor and uses up to 75% less power. Available in two different wafer-level chip-scale (WLCSP) packages: a 20 ball at 0.4mm pitch and a 36-ball at a tiny 0.35mm pitch; the device will fit into just about anything you’re planning – from mobile handsets and tablets to wearables, watches, and even “swallowed” devices.

It is available in three density levels – 4K LUTs, 2K LUTs, and 1K LUTs. However, the most interesting part is all of the new hardened IP that frees up those LUTs to do more of what you need. The company looked at the wish list for the driving applications in this market – things like infrared remote, barcode, touch, user identification, and sensor fusion – and made a hard IP buffet that goes straight to the key requirements for tiny consumer devices.

The roles of an FPGA in these systems are vital and varied. Designers want to do the traditional “FPGA” tasks like bridging otherwise incompatible interfaces and protocols and controlling protocols and timing. They also want to do more performance- and power-critical tasks that offload the applications processor and do much of the heavy lifting in areas like sensor fusion without waking the processor.

iCE40 Ultra comes with three 24mA and one 500mA constant current sinks (so you can drive LEDs and IR LEDs directly), four DSP blocks (a new an exciting feature in this class of FPGAs) with 16×16 multipliers and 32-bit accumulators, and two programmable I2C and SPI interfaces.  It also includes a 10kHz low-power oscillator, a 48MHz high-performance oscillator, and a programmable PLL. On the memory front, iCE40 Ultra includes up to 80kb of embedded block RAM, and it talks to the rest of your world through up to 26 user IOs. It is also self-contained with non-volatile configuration memory, so you don’t need the traditional additional components for configuration that most FPGAs require. 

One of the challenges of bringing FPGAs to markets where software-programmable solutions like MCUs have traditionally ruled is bringing the design team up to speed with creating FPGA designs. Lattice has helped that process along nicely, and probably dramatically improved the average time-to-market, by offering a rich library of soft IP for iCE40 Ultra as well. Using these soft IP blocks, design teams can have important capabilities up and running in hours, rather than taking the time to implement them from scratch. We expect many designs can be 80-90% complete before the team writes a line of code, just by stitching together the appropriate collection of soft IP.

The soft IP library includes IR remote control, RGB LED control (fortunately, including “disco lighting”), barcode emulation for e-commerce – which transmits barcode information via LED, a complete pedometer – including the necessary sensor fusion, an I2C expander, and an SPI expander.

If you’re ready to get started designing with iCE40 Ultra, Lattice has a dev board – the iCE 40 Ultra breakout board, that includes built-in RGB LED and IR LED hardware with a GUI-driven demo so you can have that disco-lighting remote control doing e-commerce transactions on day one. Or, as Lattice puts it, “evaluation of the Ultra family of devices and rapid development of functions and designs.”

When it comes time to put your own design magic into your iCE40 Ultra, Lattice offers their iCEcube 2 design software, which has the usual capabilities one would expect in an FPGA design package. Lattice says the new devices, breakout boards, and software support are available now, so – time to get crackin’.

2 thoughts on “FPGAs in the IoT”

  1. “One of the challenges of bringing FPGAs to markets where software-programmable solutions like MCUs have traditionally ruled is bringing the design team up to speed with creating FPGA designs”

    I think the challenge to replace MCUs by FPGAs is simply that *it requires a design team*… Most software engineers don’t want to deal with Verilog or VHDL (and other similar low-level cryptic languages/frameworks), and High-Level Synthesis is particularly useless for that space (small designs, protocol bridging).

    What’s left? A modern programming language with a C-like syntax that is tailored for hardware design. It’s probably the best choice for software engineers looking to replace their MCU by a FPGA 🙂 Check it out on https://www.synflow.com

Leave a Reply

featured blogs
May 24, 2024
Could these creepy crawly robo-critters be the first step on a slippery road to a robot uprising coupled with an insect uprising?...
May 23, 2024
We're investing in semiconductor workforce development programs in Latin America, including government and academic partnerships to foster engineering talent.The post Building the Semiconductor Workforce in Latin America appeared first on Chip Design....

featured video

Introducing Altera® Agilex 5 FPGAs and SoCs

Sponsored by Intel

Learn about the Altera Agilex 5 FPGA Family for tomorrow’s edge intelligent applications.

To learn more about Agilex 5 visit: Agilex™ 5 FPGA and SoC FPGA Product Overview

featured paper

Achieve Greater Design Flexibility and Reduce Costs with Chiplets

Sponsored by Keysight

Chiplets are a new way to build a system-on-chips (SoCs) to improve yields and reduce costs. It partitions the chip into discrete elements and connects them with a standardized interface, enabling designers to meet performance, efficiency, power, size, and cost challenges in the 5 / 6G, artificial intelligence (AI), and virtual reality (VR) era. This white paper will discuss the shift to chiplet adoption and Keysight EDA's implementation of the communication standard (UCIe) into the Keysight Advanced Design System (ADS).

Dive into the technical details – download now.

featured chalk talk

Power High-Performance Applications with Renesas RA8 Series MCUs
Sponsored by Mouser Electronics and Renesas
In this episode of Chalk Talk, Amelia Dalton and Kavita Char from Renesas explore the first 32-bit MCUs based on the new Arm® Cortex® -M85 core. They investigate how these new MCUs bridge the gap between MCUs and MPUs, the advanced security features included in this new MCU portfolio, and how you can get started using the Renesas high performance RA8 series in your next design. 
Jan 9, 2024