BDTI performed an independent analysis of Altera’s floating-point DSP design flow. BDTI’s objective was to assess the performance that can be obtained on Altera FPGAs for demanding floating-point DSP applications, and to evaluate the ease-of-use of Altera’s floating-point DSP design flow. This paper presents BDTI’s findings, along with background and methodology details.
 Altera® FPGAs and SoCs with FPGA AI Suite and OpenVINO™ Toolkit Drive Embedded/Edge AI/Machine Learning ApplicationsSponsored by Intel Describes the emerging use cases of FPGA-based AI inference in edge and custom AI applications, and software and hardware solutions for edge FPGA AI. |
