Altera recently introduced a floating-point design flow intended to streamline the process of implementing floating-point DSP algorithms on Altera FPGAs, and to enable those designs to achieve higher performance and resource usage efficiency than previously possible. BDTI performed an independent evaluation of the power consumption and energy efficiency of Altera FPGAs for demanding floating-point DSP applications. This white paper presents BDTI’s findings from this evaluation.
March 4, 2013
Very interesting, but didn’t see further read or download button. Anyway: downloadable from BDTI’s interesting site: http://www.bdti.com/MyBDTI/pubs/2013_Altera_FloatingPoint_Power.pdf
Cheers, Johan
Hi Johan,
The download button is now in place. Our apologizes.
Thanks, Amelia