An environment for functional testing, peeking and poking memory, bus discovery and a powerful scripting because today’s embedded hardware design tools do not address the design test and verification process for prototype hardware, hardware engineers are forced to resort to in-house tools or application OS based testing, resulting in poor test coverage. This paper presents a new hardware test and verification process, based on a Verification and Test OS (VTOS™). VTOS is a user configurable test platform, requiring no porting and can be testing new prototype hardware in 30 minutes. VTOS provides an environment that includes functional tests, peeking and poking memory mapped locations, bus discovery and a powerful scripting language.
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MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D SolversSponsored by Cadence Design Systems MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges. |
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Designing Robust 5G Power Amplifiers for the Real WorldSponsored by Keysight Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems. |