feature article
Subscribe Now

A New Cut at DRC

Polyteda Resets Run-Times

DRC sometimes feels like one of those sleepy, familiar technologies that’s been around forever and isn’t going to surprise you. Well, I don’t know if something’s in the water, but over the last few weeks there’s been a flurry of DRC-related activity. While some of the news involves well-known names in the biz (the best-known name being Mentor, with their overwhelmingly dominant Calibre tool), a newcomer is trying to redefine the space a bit.

The company is Polyteda, and they’ve developed a different approach to DRC. They call it One-Shot DRC, and they claim significant run-time improvements with the new product, PowerDRC.

Here’s how they see the problem with DRC today: DRC goes through these waves of being adequate, and then, as designs get bigger and more complex, the tools get bogged down, with run-times increasing faster than linearly with design size. And then something new comes along to reset the process, which repeats over time.

First it was flat DRC: the entire design was run as a single uniform entity. When that ran out of steam, hierarchical DRC was introduced. That was eventually bolstered by multi-host/multicore DRC.

Which is now running out of steam.

The problem is partly due to the hierarchical approach itself. As the layers are checked, the hierarchy has to be processed over and over, which takes a lot of time. To make matters worse, there’s not just one hierarchy, but two: a logical hierarchy and a physical hierarchy. Those two are mostly well correlated, but not perfectly. And those imperfections slow things down, and, in particular, they make the run-time much less predictable.

New, more complex checks are also making things tougher. Proximity effects are now important; antenna checks also add to the burden.

As a result, some designs are taking a week to get through DRC.

Polyteda is going at it a different way. They go to great pains to articulate that their approach is not hierarchical and it’s not flat: it’s partitioned. Rather than working layer by layer (or a few layers at a time), they break the design up into blocks, and each block is completely DRC checked, including all layers, in one go – hence the “one-shot” moniker.

They start with one block (the lower left) and, when it’s done, move to an adjacent block, passing along boundary information. This allows some level of parallelism, since, after the bottom left block, the one above and to the right can be done at the same time (and so forth as the “wave” of finished blocks sweeps northeast).

They use the hierarchy where beneficial, but it’s not strictly hierarchical DRC. They process it only once, at the beginning, which saves a lot of time. The fact that they’re not doing it hierarchically particularly helps with the top metal layers, which tend to be higher in the hierarchy. By contrast, using the hierarchy benefits the diffusion layers, where connections and effects tend to be more local.

Where they say they also shine is with designs that are less structured, more “random.” These tend to have the most complex hierarchy, which is more difficult for traditional hierarchical approaches.

The determination of the block size is handled by the tool based on the number of “objects” in the design. The number of objects in a block is typically more than dozens, and it may get into the thousands for 28-nm technology. 90- and 65-nm technologies have less object density.

The number of objects is a critical measure of the size of the design for this approach. They claim that their run-time is linear with the number of objects, independent of structure or hierarchy. This makes the run-time much more predictable. It can also change the nature of this historical DRC wave. Their historical run-time charts show that prior generations have seen run-times grow supra-linearly with design size. The fact that PowerDRC run-times are linear suggests that this particular wave might last longer before needing a refresh.

Polyteda provided some benchmark results to bolster their claims. Antenna checks were called out separately, as they saw particularly large gains – anywhere from 4X to 12X on the three designs they showed, with the 12X one saving over 37 hours of run time just on the antenna check.

Overall, the runtimes improved 2X-4X, with the large 4X-improved design saving over 100 hours.

They’ve also come up with a new language called XactCheck for writing rules. While this still allows traditional types of checks, they claim that it better expresses complex rules, including some model-based rules, so that the rule decks are shorter. They support two categories of rules: standard DRC rules and DFM rules. They also have pattern matching on their roadmap.

Of course, any time you come up with a new approach, you have to prove that your solution is giving the right answers, and this is done by benchmarking the new approach against existing “golden” reference designs. Those golden designs are ones that are “known” to be clean. So the new tool should agree that they’re clean.

What Polyteda has actually found out, however, is that sometimes their tool doesn’t think that those designs are as clean as everyone else seems to think. The assumption, then, is that the new tool is wrong and must be fixed. That is, until they go and look at the failures that were flagged – which turn out to be accurate: they were missed by the original DRC process.

This puts the foundries in an awkward position: they really don’t want to re-open something that’s running fine and raise the possibility of a yield issue. So, according to Polyteda, the foundries are not necessarily open to admitting that the new tool is more accurate. Polyteda, however, is confident that they’re getting the right answers.

And you need confidence with a gambit like this. It’s a gutsy move to enter a mature market against a 70%-market-share behemoth. You have to be extremely well differentiated, with dramatic, not incremental, advantages. Polyteda thinks they’ve got that; it’s now up to the salesguys to see if they’re right.

 

More info:

Polyteda PowerDRC

Leave a Reply

featured blogs
Jun 2, 2023
Diversity, equity, and inclusion (DEI) are not just words but values that are exemplified through our culture at Cadence. In the DEI@Cadence blog series, you'll find a community where employees share their perspectives and experiences. By providing a glimpse of their personal...
Jun 2, 2023
I just heard something that really gave me pause for thought -- the fact that everyone experiences two forms of death (given a choice, I'd rather not experience even one)....
Jun 2, 2023
Explore the importance of big data analytics in the semiconductor manufacturing process, as chip designers pull insights from throughout the silicon lifecycle. The post Demanding Chip Complexity and Manufacturing Requirements Call for Data Analytics appeared first on New Hor...

featured video

Automate PCB P&R Tasks for Designs in Minutes

Sponsored by Cadence Design Systems

Discover how to get a dramatic reduction in design turnaround time by automating your placement, power plane generation, and critical net routing with Cadence® Allegro® X AI technology. Built on and accessed through the Allegro X Design Platform, Allegro X AI reduces P&R tasks from days to minutes with equivalent or higher quality compared with manually designed boards.

Click here for more information

featured paper

EC Solver Tech Brief

Sponsored by Cadence Design Systems

The Cadence® Celsius™ EC Solver supports electronics system designers in managing the most challenging thermal/electronic cooling problems quickly and accurately. By utilizing a powerful computational engine and meshing technology, designers can model and analyze the fluid flow and heat transfer of even the most complex electronic system and ensure the electronic cooling system is reliable.

Click to read more

featured chalk talk

Quick Connect IoT
Sponsored by Mouser Electronics and Renesas
Rapid prototyping is a vital first element to get your next IoT design into the real world. In this episode of Chalk Talk, Brad Rex from Renesas and Amelia Dalton examine Renesas’ new Quick Connect IoT out of the box IoT solution that combines well-defined API and middleware with certified module solutions to make rapid prototyping faster and easier than ever before. They also investigate how the Quick Connect IoT integrated software can help MCUs, sensors and connectivity devices communicate effectively and how you can get started using Quick-Connect IoT for your next IoT design.
Oct 31, 2022
26,401 views