A key requirement for many of today’s high volume FPGA applications is low power consumption. The MachXO2™ PLD provides many power-saving features including Power Controller, Bank Controller and Power Guard. This technical note provides users with detail for using the MachXO2 low power architectural features including power supply considerations and power estimations provided by the Power Calculator tool.

Power Modes

FPGA designers often minimize power consumption by turning off subsystems while configured and operational.

Design modes of operation are typically categorized into the following:

Normal operation:

• Device is fully operational and all circuits are active

• Highest power consumption

Low power operation:

• Subsystems are dynamically shut down when not required

• Average to low power consumption

Ultra low power standby:

• All subsystems are shut down

• Lowest power consumption provides the best option for prolonged battery life

The MachXO2 offers a flexible architecture that allows many on-chip components to be dynamically turned off during the low power operation modes.